diff mbox

[2/9] Add risu_ppc.c file

Message ID 8366F7D4-6288-406E-8C64-2FE3777FC0C3@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Programmingkid April 25, 2017, 3:18 a.m. UTC
Add the risu_ppc.c file. It defines several functions used by risu.

Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
---
  risu_ppc.c | 41 +++++++++++++++++++++++++++++++++++++++++
  1 file changed, 41 insertions(+)
  create mode 100644 risu_ppc.c

Comments

Peter Maydell April 25, 2017, 8:13 a.m. UTC | #1
On 25 April 2017 at 04:18, G 3 <programmingkidx@gmail.com> wrote:
> Add the risu_ppc.c file. It defines several functions used by risu.
>
> Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
> ---
>  risu_ppc.c | 41 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
>  create mode 100644 risu_ppc.c
>
> diff --git a/risu_ppc.c b/risu_ppc.c
> new file mode 100644
> index 0000000..70a1cf7
> --- /dev/null
> +++ b/risu_ppc.c
> @@ -0,0 +1,41 @@
> +/*****************************************************************
> + * File: risu_ppc.c
> + * Date: 3-27-2017
> + * Description: Implement advance_pc(), set_ucontext_paramreg(),
> + *              get_reginfo_paramreg(), get_risuop()
> + *****************************************************************/

All new files should have a brief copyright and license statement
in their header comment.

thanks
-- PMM
Peter Maydell April 25, 2017, 8:36 a.m. UTC | #2
On 25 April 2017 at 04:18, G 3 <programmingkidx@gmail.com> wrote:
> Add the risu_ppc.c file. It defines several functions used by risu.
>
> Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
> ---
>  risu_ppc.c | 41 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
>  create mode 100644 risu_ppc.c
>
> diff --git a/risu_ppc.c b/risu_ppc.c
> new file mode 100644
> index 0000000..70a1cf7
> --- /dev/null
> +++ b/risu_ppc.c
> @@ -0,0 +1,41 @@
> +/*****************************************************************
> + * File: risu_ppc.c
> + * Date: 3-27-2017
> + * Description: Implement advance_pc(), set_ucontext_paramreg(),
> + *              get_reginfo_paramreg(), get_risuop()
> + *****************************************************************/
> +
> +#include "risu.h"
> +
> +/* Advances the program counter register to the next instruction */
> +void advance_pc(void *vuc)
> +{
> +    ucontext_t *uc = (ucontext_t*)vuc;
> +    uc->uc_mcontext->ss.srr0 += 4;
> +}
> +
> +/* Sets register r0 to the address of a memory block. */
> +void set_ucontext_paramreg(void *vuc, uint64_t value)
> +{
> +    ucontext_t *uc = vuc;
> +    uc->uc_mcontext->ss.r0 = value;
> +}

This doesn't look like it matches the Linux PPC uc_mcontext
struct, which (like the ppc64 one) has a uc_mcontext.regs
field, not uc_mcontext->ss.

Risu is a Linux program, so all CPU backends must build
on Linux. It could perhaps be ported to other host OSes,
but we'd need to put in more infrastructure for dealing
with host OS differences, not just have "PPC works only
on OSX and the others work only on Linux".

thanks
-- PMM
Programmingkid April 25, 2017, 2:23 p.m. UTC | #3
On Apr 25, 2017, at 4:36 AM, Peter Maydell wrote:

> On 25 April 2017 at 04:18, G 3 <programmingkidx@gmail.com> wrote:
>> Add the risu_ppc.c file. It defines several functions used by risu.
>>
>> Signed-off-by: John Arbuckle <programmingkidx@gmail.com>
>> ---
>>  risu_ppc.c | 41 +++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 41 insertions(+)
>>  create mode 100644 risu_ppc.c
>>
>> diff --git a/risu_ppc.c b/risu_ppc.c
>> new file mode 100644
>> index 0000000..70a1cf7
>> --- /dev/null
>> +++ b/risu_ppc.c
>> @@ -0,0 +1,41 @@
>> +/*****************************************************************
>> + * File: risu_ppc.c
>> + * Date: 3-27-2017
>> + * Description: Implement advance_pc(), set_ucontext_paramreg(),
>> + *              get_reginfo_paramreg(), get_risuop()
>> + *****************************************************************/
>> +
>> +#include "risu.h"
>> +
>> +/* Advances the program counter register to the next instruction */
>> +void advance_pc(void *vuc)
>> +{
>> +    ucontext_t *uc = (ucontext_t*)vuc;
>> +    uc->uc_mcontext->ss.srr0 += 4;
>> +}
>> +
>> +/* Sets register r0 to the address of a memory block. */
>> +void set_ucontext_paramreg(void *vuc, uint64_t value)
>> +{
>> +    ucontext_t *uc = vuc;
>> +    uc->uc_mcontext->ss.r0 = value;
>> +}
>
> This doesn't look like it matches the Linux PPC uc_mcontext
> struct, which (like the ppc64 one) has a uc_mcontext.regs
> field, not uc_mcontext->ss.
>
> Risu is a Linux program, so all CPU backends must build
> on Linux. It could perhaps be ported to other host OSes,
> but we'd need to put in more infrastructure for dealing
> with host OS differences, not just have "PPC works only
> on OSX and the others work only on Linux".
>
> thanks
> -- PMM

What about having it work on both Mac OS X and Linux? A few #ifdef's  
should work.
diff mbox

Patch

diff --git a/risu_ppc.c b/risu_ppc.c
new file mode 100644
index 0000000..70a1cf7
--- /dev/null
+++ b/risu_ppc.c
@@ -0,0 +1,41 @@ 
+/*****************************************************************
+ * File: risu_ppc.c
+ * Date: 3-27-2017
+ * Description: Implement advance_pc(), set_ucontext_paramreg(),
+ *              get_reginfo_paramreg(), get_risuop()
+ *****************************************************************/
+
+#include "risu.h"
+
+/* Advances the program counter register to the next instruction */
+void advance_pc(void *vuc)
+{
+    ucontext_t *uc = (ucontext_t*)vuc;
+    uc->uc_mcontext->ss.srr0 += 4;
+}
+
+/* Sets register r0 to the address of a memory block. */
+void set_ucontext_paramreg(void *vuc, uint64_t value)
+{
+    ucontext_t *uc = vuc;
+    uc->uc_mcontext->ss.r0 = value;
+}
+
+/*
+ * Returns the register that keeps track of a memory block address.
+ * Used for the load and store to memory instructions like LFD.
+ * Returns general purpose register r0.
+ */
+uint64_t get_reginfo_paramreg(struct reginfo *ri)
+{
+    return ri->gpr[0];
+}
+
+int get_risuop(struct reginfo *ri)
+{
+    uint32_t insn = ri->faulting_insn;
+    uint32_t op = insn & 0xf;
+    uint32_t key = insn & ~0xf;
+    uint32_t risukey = 0x00005af0;
+    return (key != risukey) ? -1 : op;
+}