| Message ID | 20170425195712.2017230-1-arnd@arndb.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Apr 25, 2017 at 09:56:53PM +0200, Arnd Bergmann wrote: > On 32-bit machines, we can't divide 64-bit integers: > > drivers/gpu/drm/arm/malidp_crtc.o: In function `malidp_crtc_atomic_check': > malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3c0): undefined reference to `__aeabi_uldivmod' > malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3dc): undefined reference to `__aeabi_uldivmod' > > This calls the div_u64 function explicitly instead. > > Fixes: 4cea4e9f6690 ("drm: mali-dp: Add plane upscaling support") > Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Liviu Dudau <liviu.dudau@arm.com> I'll push the patch to the mali-dp repository. Dave A., if you have pulled the mali-dp patches then this will need to go in as well, otherwise I will send an updated pull request soon. Best regards, Liviu > --- > drivers/gpu/drm/arm/malidp_crtc.c | 9 ++++----- > 1 file changed, 4 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c > index 19f1f3b34691..9446a673d469 100644 > --- a/drivers/gpu/drm/arm/malidp_crtc.c > +++ b/drivers/gpu/drm/arm/malidp_crtc.c > @@ -266,7 +266,6 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, > > drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { > struct malidp_plane *mp = to_malidp_plane(plane); > - u64 crtc_w, crtc_h; > u32 phase; > > if (!(mp->layer->id & scaling)) > @@ -276,10 +275,10 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, > * Convert crtc_[w|h] to U32.32, then divide by U16.16 src_[w|h] > * to get the U16.16 result. > */ > - crtc_w = (u64)pstate->crtc_w << 32; > - crtc_h = (u64)pstate->crtc_h << 32; > - h_upscale_factor = (u32)(crtc_w / pstate->src_w); > - v_upscale_factor = (u32)(crtc_h / pstate->src_h); > + h_upscale_factor = div_u64((u64)pstate->crtc_w << 32, > + pstate->src_w); > + v_upscale_factor = div_u64((u64)pstate->crtc_h << 32, > + pstate->src_h); > > s->enhancer_enable = ((h_upscale_factor >> 16) >= 2 || > (v_upscale_factor >> 16) >= 2); > -- > 2.9.0 >
diff --git a/drivers/gpu/drm/arm/malidp_crtc.c b/drivers/gpu/drm/arm/malidp_crtc.c index 19f1f3b34691..9446a673d469 100644 --- a/drivers/gpu/drm/arm/malidp_crtc.c +++ b/drivers/gpu/drm/arm/malidp_crtc.c @@ -266,7 +266,6 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, drm_atomic_crtc_state_for_each_plane_state(plane, pstate, state) { struct malidp_plane *mp = to_malidp_plane(plane); - u64 crtc_w, crtc_h; u32 phase; if (!(mp->layer->id & scaling)) @@ -276,10 +275,10 @@ static int malidp_crtc_atomic_check_scaling(struct drm_crtc *crtc, * Convert crtc_[w|h] to U32.32, then divide by U16.16 src_[w|h] * to get the U16.16 result. */ - crtc_w = (u64)pstate->crtc_w << 32; - crtc_h = (u64)pstate->crtc_h << 32; - h_upscale_factor = (u32)(crtc_w / pstate->src_w); - v_upscale_factor = (u32)(crtc_h / pstate->src_h); + h_upscale_factor = div_u64((u64)pstate->crtc_w << 32, + pstate->src_w); + v_upscale_factor = div_u64((u64)pstate->crtc_h << 32, + pstate->src_h); s->enhancer_enable = ((h_upscale_factor >> 16) >= 2 || (v_upscale_factor >> 16) >= 2);
On 32-bit machines, we can't divide 64-bit integers: drivers/gpu/drm/arm/malidp_crtc.o: In function `malidp_crtc_atomic_check': malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3c0): undefined reference to `__aeabi_uldivmod' malidp_crtc.c:(.text.malidp_crtc_atomic_check+0x3dc): undefined reference to `__aeabi_uldivmod' This calls the div_u64 function explicitly instead. Fixes: 4cea4e9f6690 ("drm: mali-dp: Add plane upscaling support") Signed-off-by: Arnd Bergmann <arnd@arndb.de> --- drivers/gpu/drm/arm/malidp_crtc.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-)