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[200.153.216.19]) by smtp.gmail.com with ESMTPSA id y188sm1857958qkb.27.2017.04.27.08.15.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Apr 2017 08:15:28 -0700 (PDT) From: Gustavo Padovan To: dri-devel@lists.freedesktop.org Subject: [RFC v2 2/7] drm/virtio: support async cursor updates Date: Thu, 27 Apr 2017 12:15:14 -0300 Message-Id: <20170427151519.8308-3-gustavo@padovan.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170427151519.8308-1-gustavo@padovan.org> References: <20170427151519.8308-1-gustavo@padovan.org> Cc: Gustavo Padovan X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Gustavo Padovan Short circuit the update path for cursors and use the drm async update infrastructure. v2: move fb setting to core and use new state (Eric Anholt) Signed-off-by: Gustavo Padovan --- I wrote this mostly for testing purposes, not sure if its something that we actually need for virtio. --- drivers/gpu/drm/virtio/virtgpu_plane.c | 42 ++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/drivers/gpu/drm/virtio/virtgpu_plane.c b/drivers/gpu/drm/virtio/virtgpu_plane.c index 76d5fed..783f146 100644 --- a/drivers/gpu/drm/virtio/virtgpu_plane.c +++ b/drivers/gpu/drm/virtio/virtgpu_plane.c @@ -260,6 +260,46 @@ static void virtio_gpu_cursor_plane_update(struct drm_plane *plane, virtio_gpu_cursor_ping(vgdev, output); } +static int virtio_gpu_cursor_plane_async_check(struct drm_plane *plane, + struct drm_plane_state *new_state) +{ + struct virtio_gpu_output *output; + + if (!plane->state->crtc) + return -EINVAL; + + output = drm_crtc_to_virtio_gpu_output(plane->state->crtc); + if (!output) + return -EINVAL; + + if (plane->state->fb != new_state->fb) + return -EINVAL; + + return 0; +} + +static void virtio_gpu_cursor_plane_async_update(struct drm_plane *plane, + struct drm_plane_state *new_state) +{ + struct drm_device *dev = plane->dev; + struct virtio_gpu_device *vgdev = dev->dev_private; + struct virtio_gpu_output *output = NULL; + + output = drm_crtc_to_virtio_gpu_output(plane->state->crtc); + if (WARN_ON(!output)) + return; + + if (plane->state->fb != new_state->fb) + return; + + DRM_DEBUG("move +%d+%d\n", new_state->crtc_x, new_state->crtc_y); + + output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR); + output->cursor.pos.x = cpu_to_le32(new_state->crtc_x); + output->cursor.pos.y = cpu_to_le32(new_state->crtc_y); + virtio_gpu_cursor_ping(vgdev, output); +} + static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = { .atomic_check = virtio_gpu_plane_atomic_check, .atomic_update = virtio_gpu_primary_plane_update, @@ -268,6 +308,8 @@ static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = { static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = { .atomic_check = virtio_gpu_plane_atomic_check, .atomic_update = virtio_gpu_cursor_plane_update, + .atomic_async_check = virtio_gpu_cursor_plane_async_check, + .atomic_async_update = virtio_gpu_cursor_plane_async_update, }; struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,