diff mbox

[libdrm,3/3] intel: PCI Ids for U SKU in CFL

Message ID 1498063146-10802-3-git-send-email-anusha.srivatsa@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Srivatsa, Anusha June 21, 2017, 4:39 p.m. UTC 
Add the PCI IDs for U SKU IN CFL by following the spec.

v2: Update IDs

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 intel/intel_chipset.h | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

Comments

Taylor, Clinton A June 21, 2017, 7:50 p.m. UTC | #1 
On 06/21/2017 09:39 AM, Anusha Srivatsa wrote:
> Add the PCI IDs for U SKU IN CFL by following the spec.
>
> v2: Update IDs
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>   intel/intel_chipset.h | 12 +++++++++++-
>   1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> index 4da145c..8a0d4ff 100644
> --- a/intel/intel_chipset.h
> +++ b/intel/intel_chipset.h
> @@ -228,6 +228,10 @@
>   #define PCI_CHIP_COFFEELAKE_S_GT2_3     0x3E96
>   #define PCI_CHIP_COFFEELAKE_H_GT2_1     0x3E9B
>   #define PCI_CHIP_COFFEELAKE_H_GT2_2     0x3E94
> +#define PCI_CHIP_COFFEELAKE_U_GT3_1     0x3EA5
> +#define PCI_CHIP_COFFEELAKE_U_GT3_2     0x3EA6
> +#define PCI_CHIP_COFFEELAKE_U_GT3_3     0x3EA7
> +#define PCI_CHIP_COFFEELAKE_U_GT3_4     0x3EA8
0x3EA8 is marked not POR in the current documentation.

-Clint

>   
>   #define IS_MOBILE(devid)	((devid) == PCI_CHIP_I855_GM || \
>   				 (devid) == PCI_CHIP_I915_GM || \
> @@ -469,8 +473,14 @@
>   #define IS_CFL_H(devid)         ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \
>                                    (devid) == PCI_CHIP_COFFEELAKE_H_GT2_2)
>   
> +#define IS_CFL_U(devid)         ((devid) == PCI_CHIP_COFFEELAKE_U_GT3_1 || \
> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_2 || \
> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_3 || \
> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_4)
> +
>   #define IS_COFFEELAKE(devid)   (IS_CFL_S(devid) || \
> -				IS_CFL_H(devid))
> +				IS_CFL_H(devid) || \
> +				IS_CFL_U(devid))
>   
>   #define IS_GEN9(devid)		(IS_SKYLAKE(devid)  || \
>   				 IS_BROXTON(devid)  || \
Srivatsa, Anusha June 21, 2017, 9:16 p.m. UTC | #2 
>-----Original Message-----

>From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of

>Clint Taylor

>Sent: Wednesday, June 21, 2017 12:51 PM

>To: intel-gfx@lists.freedesktop.org

>Subject: Re: [Intel-gfx] [PATCH libdrm 3/3] intel: PCI Ids for U SKU in CFL

>

>

>

>On 06/21/2017 09:39 AM, Anusha Srivatsa wrote:

>> Add the PCI IDs for U SKU IN CFL by following the spec.

>>

>> v2: Update IDs

>>

>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

>> ---

>>   intel/intel_chipset.h | 12 +++++++++++-

>>   1 file changed, 11 insertions(+), 1 deletion(-)

>>

>> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index

>> 4da145c..8a0d4ff 100644

>> --- a/intel/intel_chipset.h

>> +++ b/intel/intel_chipset.h

>> @@ -228,6 +228,10 @@

>>   #define PCI_CHIP_COFFEELAKE_S_GT2_3     0x3E96

>>   #define PCI_CHIP_COFFEELAKE_H_GT2_1     0x3E9B

>>   #define PCI_CHIP_COFFEELAKE_H_GT2_2     0x3E94

>> +#define PCI_CHIP_COFFEELAKE_U_GT3_1     0x3EA5

>> +#define PCI_CHIP_COFFEELAKE_U_GT3_2     0x3EA6

>> +#define PCI_CHIP_COFFEELAKE_U_GT3_3     0x3EA7

>> +#define PCI_CHIP_COFFEELAKE_U_GT3_4     0x3EA8

>0x3EA8 is marked not POR in the current documentation.


Hmm....for now the intention was  to match the IDs we currently have in the i915 to  libdrm and IGT so that we have same IDs everywhere....

Anusha 
>-Clint

>

>>

>>   #define IS_MOBILE(devid)	((devid) == PCI_CHIP_I855_GM || \

>>   				 (devid) == PCI_CHIP_I915_GM || \ @@ -469,8

>+473,14 @@

>>   #define IS_CFL_H(devid)         ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \

>>                                    (devid) ==

>> PCI_CHIP_COFFEELAKE_H_GT2_2)

>>

>> +#define IS_CFL_U(devid)         ((devid) == PCI_CHIP_COFFEELAKE_U_GT3_1 || \

>> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_2 || \

>> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_3 || \

>> +                                 (devid) ==

>> +PCI_CHIP_COFFEELAKE_U_GT3_4)

>> +

>>   #define IS_COFFEELAKE(devid)   (IS_CFL_S(devid) || \

>> -				IS_CFL_H(devid))

>> +				IS_CFL_H(devid) || \

>> +				IS_CFL_U(devid))

>>

>>   #define IS_GEN9(devid)		(IS_SKYLAKE(devid)  || \

>>   				 IS_BROXTON(devid)  || \

>

>_______________________________________________

>Intel-gfx mailing list

>Intel-gfx@lists.freedesktop.org

>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Taylor, Clinton A June 28, 2017, 9:09 p.m. UTC | #3 
On 06/21/2017 09:39 AM, Anusha Srivatsa wrote:
> Add the PCI IDs for U SKU IN CFL by following the spec.
>
> v2: Update IDs
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>   intel/intel_chipset.h | 12 +++++++++++-
>   1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
> index 4da145c..8a0d4ff 100644
> --- a/intel/intel_chipset.h
> +++ b/intel/intel_chipset.h
> @@ -228,6 +228,10 @@
>   #define PCI_CHIP_COFFEELAKE_S_GT2_3     0x3E96
>   #define PCI_CHIP_COFFEELAKE_H_GT2_1     0x3E9B
>   #define PCI_CHIP_COFFEELAKE_H_GT2_2     0x3E94
> +#define PCI_CHIP_COFFEELAKE_U_GT3_1     0x3EA5
> +#define PCI_CHIP_COFFEELAKE_U_GT3_2     0x3EA6
> +#define PCI_CHIP_COFFEELAKE_U_GT3_3     0x3EA7
> +#define PCI_CHIP_COFFEELAKE_U_GT3_4     0x3EA8
Matches values in i915 driver.
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>

>   
>   #define IS_MOBILE(devid)	((devid) == PCI_CHIP_I855_GM || \
>   				 (devid) == PCI_CHIP_I915_GM || \
> @@ -469,8 +473,14 @@
>   #define IS_CFL_H(devid)         ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \
>                                    (devid) == PCI_CHIP_COFFEELAKE_H_GT2_2)
>   
> +#define IS_CFL_U(devid)         ((devid) == PCI_CHIP_COFFEELAKE_U_GT3_1 || \
> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_2 || \
> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_3 || \
> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_4)
> +
>   #define IS_COFFEELAKE(devid)   (IS_CFL_S(devid) || \
> -				IS_CFL_H(devid))
> +				IS_CFL_H(devid) || \
> +				IS_CFL_U(devid))
>   
>   #define IS_GEN9(devid)		(IS_SKYLAKE(devid)  || \
>   				 IS_BROXTON(devid)  || \
Rodrigo Vivi June 29, 2017, 5:55 p.m. UTC | #4 
series merged to libdrm. thanks for patches and review.

On Wed, Jun 28, 2017 at 2:09 PM, Clint Taylor
<clinton.a.taylor@intel.com> wrote:
>
>
> On 06/21/2017 09:39 AM, Anusha Srivatsa wrote:
>>
>> Add the PCI IDs for U SKU IN CFL by following the spec.
>>
>> v2: Update IDs
>>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>>   intel/intel_chipset.h | 12 +++++++++++-
>>   1 file changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
>> index 4da145c..8a0d4ff 100644
>> --- a/intel/intel_chipset.h
>> +++ b/intel/intel_chipset.h
>> @@ -228,6 +228,10 @@
>>   #define PCI_CHIP_COFFEELAKE_S_GT2_3     0x3E96
>>   #define PCI_CHIP_COFFEELAKE_H_GT2_1     0x3E9B
>>   #define PCI_CHIP_COFFEELAKE_H_GT2_2     0x3E94
>> +#define PCI_CHIP_COFFEELAKE_U_GT3_1     0x3EA5
>> +#define PCI_CHIP_COFFEELAKE_U_GT3_2     0x3EA6
>> +#define PCI_CHIP_COFFEELAKE_U_GT3_3     0x3EA7
>> +#define PCI_CHIP_COFFEELAKE_U_GT3_4     0x3EA8
>
> Matches values in i915 driver.
> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
>
>>     #define IS_MOBILE(devid)    ((devid) == PCI_CHIP_I855_GM || \
>>                                  (devid) == PCI_CHIP_I915_GM || \
>> @@ -469,8 +473,14 @@
>>   #define IS_CFL_H(devid)         ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1
>> || \
>>                                    (devid) == PCI_CHIP_COFFEELAKE_H_GT2_2)
>>   +#define IS_CFL_U(devid)         ((devid) == PCI_CHIP_COFFEELAKE_U_GT3_1
>> || \
>> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_2
>> || \
>> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_3
>> || \
>> +                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_4)
>> +
>>   #define IS_COFFEELAKE(devid)   (IS_CFL_S(devid) || \
>> -                               IS_CFL_H(devid))
>> +                               IS_CFL_H(devid) || \
>> +                               IS_CFL_U(devid))
>>     #define IS_GEN9(devid)              (IS_SKYLAKE(devid)  || \
>>                                  IS_BROXTON(devid)  || \
>
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h
index 4da145c..8a0d4ff 100644
--- a/intel/intel_chipset.h
+++ b/intel/intel_chipset.h
@@ -228,6 +228,10 @@ 
 #define PCI_CHIP_COFFEELAKE_S_GT2_3     0x3E96
 #define PCI_CHIP_COFFEELAKE_H_GT2_1     0x3E9B
 #define PCI_CHIP_COFFEELAKE_H_GT2_2     0x3E94
+#define PCI_CHIP_COFFEELAKE_U_GT3_1     0x3EA5
+#define PCI_CHIP_COFFEELAKE_U_GT3_2     0x3EA6
+#define PCI_CHIP_COFFEELAKE_U_GT3_3     0x3EA7
+#define PCI_CHIP_COFFEELAKE_U_GT3_4     0x3EA8
 
 #define IS_MOBILE(devid)	((devid) == PCI_CHIP_I855_GM || \
 				 (devid) == PCI_CHIP_I915_GM || \
@@ -469,8 +473,14 @@ 
 #define IS_CFL_H(devid)         ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \
                                  (devid) == PCI_CHIP_COFFEELAKE_H_GT2_2)
 
+#define IS_CFL_U(devid)         ((devid) == PCI_CHIP_COFFEELAKE_U_GT3_1 || \
+                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_2 || \
+                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_3 || \
+                                 (devid) == PCI_CHIP_COFFEELAKE_U_GT3_4)
+
 #define IS_COFFEELAKE(devid)   (IS_CFL_S(devid) || \
-				IS_CFL_H(devid))
+				IS_CFL_H(devid) || \
+				IS_CFL_U(devid))
 
 #define IS_GEN9(devid)		(IS_SKYLAKE(devid)  || \
 				 IS_BROXTON(devid)  || \