diff mbox

drm/i915/gvt: Fix the vblank timer close issue after shutdown VMs in reverse

Message ID 1499933254-344-1-git-send-email-fred.gao@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Gao, Fred July 13, 2017, 8:07 a.m. UTC
Once the Windows guest is shutdown, the display pipe will be disabled
and intel_gvt_check_vblank_emulation will be called to check if the
vblank timer is turned off. Given the scenario of creating VM1 ,VM2,
destoying VM2 in current code, VM1 has pipe enabled and continues to
check VM2, the flag have_enabled_pipe is always false since all the VM2
pipes are disabled, so the vblank timer will be canceled and TDR happens
in Windows VM1 guest due to the vsync timeout.

In this patch the vblank timer will be never canceled once one pipe is
enabled.

Cc: Wang, Hongbo <hongbo.wang@intel.com>
Signed-off-by: fred gao <fred.gao@intel.com>
---
 drivers/gpu/drm/i915/gvt/display.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index 2deb05f..1ab6639 100644
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -329,21 +329,23 @@  void intel_gvt_check_vblank_emulation(struct intel_gvt *gvt)
 	if (WARN_ON(!mutex_is_locked(&gvt->lock)))
 		return;
 
-	hrtimer_cancel(&irq->vblank_timer.timer);
-
 	for_each_active_vgpu(gvt, vgpu, id) {
 		for (pipe = 0; pipe < I915_MAX_PIPES; pipe++) {
 			have_enabled_pipe =
 				pipe_is_enabled(vgpu, pipe);
 			if (have_enabled_pipe)
-				break;
+				goto out;
 		}
 	}
 
+out:
 	if (have_enabled_pipe)
 		hrtimer_start(&irq->vblank_timer.timer,
 			ktime_add_ns(ktime_get(), irq->vblank_timer.period),
 			HRTIMER_MODE_ABS);
+	else
+		hrtimer_cancel(&irq->vblank_timer.timer);
+
 }
 
 static void emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe)