From patchwork Fri Aug 4 22:44:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 9882243 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D458260375 for ; Fri, 4 Aug 2017 22:46:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C788C289EF for ; Fri, 4 Aug 2017 22:46:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BCA9E289F1; Fri, 4 Aug 2017 22:46:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 452CC289EF for ; Fri, 4 Aug 2017 22:46:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2B43E6E5E8; Fri, 4 Aug 2017 22:44:30 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from galahad.ideasonboard.com (galahad.ideasonboard.com [185.26.127.97]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9CFF36E5DC for ; Fri, 4 Aug 2017 22:44:27 +0000 (UTC) Received: from avalon.bb.dnainternet.fi (dfj612ybrt5fhg77mgycy-3.rev.dnainternet.fi [IPv6:2001:14ba:21f5:5b00:2e86:4862:ef6a:2804]) by galahad.ideasonboard.com (Postfix) with ESMTPSA id 9BDC2208FE; Sat, 5 Aug 2017 00:43:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1501886593; bh=t8zY0r/+eidB3oNiXtT0DEbhRlDhem/yre3LTCXRZVE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PoSUhia7SbJ6xC8FDJmruucuI7daioC8PuVzCcbRooXcSoAzQjh331AyUfGQ7FLAm 3qSAH4/dz6eczRV//VfB7nGQfIEnusy2UafhmhTk33XeVxfMF3QhJoNFllpJEJ88Qu dnkjs5hoRBVigCHXtOpYyKKjCilnHDW6DgzBfp/8= From: Laurent Pinchart To: dri-devel@lists.freedesktop.org Subject: [PATCH v3 23/35] drm: omapdrm: Move DISPC_CLK_SWITCH reg feature to struct dss_features Date: Sat, 5 Aug 2017 01:44:07 +0300 Message-Id: <20170804224419.30758-24-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170804224419.30758-1-laurent.pinchart@ideasonboard.com> References: <20170804224419.30758-1-laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The register belongs to the DSS, move the feature to the dss_features structure. Signed-off-by: Laurent Pinchart --- drivers/gpu/drm/omapdrm/dss/dss.c | 15 +++++++++++---- drivers/gpu/drm/omapdrm/dss/dss.h | 5 +++++ drivers/gpu/drm/omapdrm/dss/dss_features.c | 10 ---------- drivers/gpu/drm/omapdrm/dss/dss_features.h | 1 - 4 files changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dss.c b/drivers/gpu/drm/omapdrm/dss/dss.c index 3d6b1e8ec0c0..d145d9eedfa7 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.c +++ b/drivers/gpu/drm/omapdrm/dss/dss.c @@ -86,6 +86,7 @@ struct dss_features { const enum omap_display_type *ports; int num_ports; const struct dss_ops *ops; + struct dss_reg_field dispc_clk_switch; }; static struct { @@ -427,7 +428,6 @@ static int dss_get_channel_index(enum omap_channel channel) static void dss_select_dispc_clk_source(enum dss_clk_source clk_src) { int b; - u8 start, end; /* * We always use PRCM clock as the DISPC func clock, except on DSS3, @@ -452,9 +452,9 @@ static void dss_select_dispc_clk_source(enum dss_clk_source clk_src) return; } - dss_feat_get_reg_field(FEAT_REG_DISPC_CLK_SWITCH, &start, &end); - - REG_FLD_MOD(DSS_CONTROL, b, start, end); /* DISPC_CLK_SWITCH */ + REG_FLD_MOD(DSS_CONTROL, b, /* DISPC_CLK_SWITCH */ + dss.feat->dispc_clk_switch.start, + dss.feat->dispc_clk_switch.end); dss.dispc_clk_source = clk_src; } @@ -1010,6 +1010,7 @@ static const struct dss_features omap24xx_dss_feats = { .ports = omap2plus_ports, .num_ports = ARRAY_SIZE(omap2plus_ports), .ops = &dss_ops_omap2_omap3, + .dispc_clk_switch = { 0, 0 }, }; static const struct dss_features omap34xx_dss_feats = { @@ -1020,6 +1021,7 @@ static const struct dss_features omap34xx_dss_feats = { .ports = omap34xx_ports, .num_ports = ARRAY_SIZE(omap34xx_ports), .ops = &dss_ops_omap2_omap3, + .dispc_clk_switch = { 0, 0 }, }; static const struct dss_features omap3630_dss_feats = { @@ -1030,6 +1032,7 @@ static const struct dss_features omap3630_dss_feats = { .ports = omap2plus_ports, .num_ports = ARRAY_SIZE(omap2plus_ports), .ops = &dss_ops_omap2_omap3, + .dispc_clk_switch = { 0, 0 }, }; static const struct dss_features omap44xx_dss_feats = { @@ -1040,6 +1043,7 @@ static const struct dss_features omap44xx_dss_feats = { .ports = omap2plus_ports, .num_ports = ARRAY_SIZE(omap2plus_ports), .ops = &dss_ops_omap4, + .dispc_clk_switch = { 9, 8 }, }; static const struct dss_features omap54xx_dss_feats = { @@ -1050,6 +1054,7 @@ static const struct dss_features omap54xx_dss_feats = { .ports = omap2plus_ports, .num_ports = ARRAY_SIZE(omap2plus_ports), .ops = &dss_ops_omap5, + .dispc_clk_switch = { 9, 7 }, }; static const struct dss_features am43xx_dss_feats = { @@ -1060,6 +1065,7 @@ static const struct dss_features am43xx_dss_feats = { .ports = omap2plus_ports, .num_ports = ARRAY_SIZE(omap2plus_ports), .ops = &dss_ops_omap2_omap3, + .dispc_clk_switch = { 0, 0 }, }; static const struct dss_features dra7xx_dss_feats = { @@ -1070,6 +1076,7 @@ static const struct dss_features dra7xx_dss_feats = { .ports = dra7xx_ports, .num_ports = ARRAY_SIZE(dra7xx_ports), .ops = &dss_ops_dra7, + .dispc_clk_switch = { 9, 7 }, }; static int dss_init_ports(struct platform_device *pdev) diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index b7ce0eacdd0e..ac642607321e 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -200,6 +200,11 @@ struct dss_pll { struct dss_pll_clock_info cinfo; }; +/* Defines a generic omap register field */ +struct dss_reg_field { + u8 start, end; +}; + struct dispc_clock_info { /* rates that we get with dividers below */ unsigned long lck; diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.c b/drivers/gpu/drm/omapdrm/dss/dss_features.c index faa9bc3c03b2..04848196780e 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.c +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.c @@ -28,11 +28,6 @@ #include "dss.h" #include "dss_features.h" -/* Defines a generic omap register field */ -struct dss_reg_field { - u8 start, end; -}; - struct dss_param_range { int min, max; }; @@ -59,7 +54,6 @@ static const struct dss_reg_field omap2_dss_reg_fields[] = { [FEAT_REG_FIFOSIZE] = { 8, 0 }, [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, [FEAT_REG_VERTICALACCU] = { 25, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, }; static const struct dss_reg_field omap3_dss_reg_fields[] = { @@ -70,7 +64,6 @@ static const struct dss_reg_field omap3_dss_reg_fields[] = { [FEAT_REG_FIFOSIZE] = { 10, 0 }, [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, [FEAT_REG_VERTICALACCU] = { 25, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, }; static const struct dss_reg_field am43xx_dss_reg_fields[] = { @@ -81,7 +74,6 @@ static const struct dss_reg_field am43xx_dss_reg_fields[] = { [FEAT_REG_FIFOSIZE] = { 10, 0 }, [FEAT_REG_HORIZONTALACCU] = { 9, 0 }, [FEAT_REG_VERTICALACCU] = { 25, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 }, }; static const struct dss_reg_field omap4_dss_reg_fields[] = { @@ -92,7 +84,6 @@ static const struct dss_reg_field omap4_dss_reg_fields[] = { [FEAT_REG_FIFOSIZE] = { 15, 0 }, [FEAT_REG_HORIZONTALACCU] = { 10, 0 }, [FEAT_REG_VERTICALACCU] = { 26, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 }, }; static const struct dss_reg_field omap5_dss_reg_fields[] = { @@ -103,7 +94,6 @@ static const struct dss_reg_field omap5_dss_reg_fields[] = { [FEAT_REG_FIFOSIZE] = { 15, 0 }, [FEAT_REG_HORIZONTALACCU] = { 10, 0 }, [FEAT_REG_VERTICALACCU] = { 26, 16 }, - [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 7 }, }; static const enum omap_dss_output_id omap2_dss_supported_outputs[] = { diff --git a/drivers/gpu/drm/omapdrm/dss/dss_features.h b/drivers/gpu/drm/omapdrm/dss/dss_features.h index 89a36d2b57a7..e0e825db4b0a 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss_features.h +++ b/drivers/gpu/drm/omapdrm/dss/dss_features.h @@ -73,7 +73,6 @@ enum dss_feat_reg_field { FEAT_REG_FIFOSIZE, FEAT_REG_HORIZONTALACCU, FEAT_REG_VERTICALACCU, - FEAT_REG_DISPC_CLK_SWITCH, }; enum dss_range_param {