Message ID | 20170808100952.26448-1-david.weinehall@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Aug 08, 2017 at 10:34:46AM -0000, Patchwork wrote: > == Series Details == > > Series: drm/i915: Add has_psr-flag to gen9lp > URL : https://patchwork.freedesktop.org/series/28488/ > State : failure > > == Summary == > > Series 28488v1 drm/i915: Add has_psr-flag to gen9lp > https://patchwork.freedesktop.org/api/1.0/series/28488/revisions/1/mbox/ > > Test gem_exec_suspend: > Subgroup basic-s3: > pass -> INCOMPLETE (fi-skl-6260u) SKL isn't GEN9LP, so this is unrelated. > Test kms_pipe_crc_basic: > Subgroup hang-read-crc-pipe-b: > dmesg-warn -> PASS (fi-pnv-d510) fdo#101597 PineView isn't GEN9LP, so this is also unrelated. > fdo#101597 https://bugs.freedesktop.org/show_bug.cgi?id=101597 > > fi-bdw-5557u total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:442s > fi-bdw-gvtdvm total:279 pass:265 dwarn:0 dfail:0 fail:0 skip:14 time:416s > fi-blb-e6850 total:279 pass:224 dwarn:1 dfail:0 fail:0 skip:54 time:358s > fi-bsw-n3050 total:279 pass:243 dwarn:0 dfail:0 fail:0 skip:36 time:487s > fi-bxt-j4205 total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:485s > fi-byt-j1900 total:279 pass:254 dwarn:1 dfail:0 fail:0 skip:24 time:523s > fi-byt-n2820 total:279 pass:250 dwarn:1 dfail:0 fail:0 skip:28 time:511s > fi-glk-2a total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:583s > fi-hsw-4770 total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:433s > fi-hsw-4770r total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:408s > fi-ilk-650 total:279 pass:229 dwarn:0 dfail:0 fail:0 skip:50 time:417s > fi-ivb-3520m total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:497s > fi-ivb-3770 total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:473s > fi-kbl-7500u total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:460s > fi-kbl-7560u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:564s > fi-kbl-r total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:579s > fi-pnv-d510 total:279 pass:223 dwarn:1 dfail:0 fail:0 skip:55 time:584s > fi-skl-6260u total:109 pass:105 dwarn:0 dfail:0 fail:0 skip:3 > fi-skl-6700k total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:639s > fi-skl-6770hq total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:468s > fi-skl-gvtdvm total:279 pass:266 dwarn:0 dfail:0 fail:0 skip:13 time:423s > fi-skl-x1585l total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:487s > fi-snb-2520m total:279 pass:251 dwarn:0 dfail:0 fail:0 skip:28 time:545s > fi-snb-2600 total:279 pass:250 dwarn:0 dfail:0 fail:0 skip:29 time:405s > > 3d87f89058607b2a2adecf99ddb637a676b4df64 drm-tip: 2017y-08m-08d-09h-05m-05s UTC integration manifest > 719c12b943ba drm/i915: Add has_psr-flag to gen9lp > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5338/
a long time ago I had agreed with Daniel that we would only add new platforms after it was enabled by default on previous platforms. a big reason for that is that we was willing to reduce the platforms to validate and do better validation one by one before enabling. However now I believe it would be beneficial to have that supported added so we can get more brave people using in different platforms so we could capture more corner cases before we enable it by default. Also we can still enable by default one platform at time if needed. So: Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> I also checked the spec to see if there was anything else new or different for these platforms and didn't find anything so: Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> But let's wait a bit to merge to give Daniel or others a time to nack ;) Cheers, Rodrigo. On Tue, Aug 8, 2017 at 3:09 AM, David Weinehall <david.weinehall@linux.intel.com> wrote: > While testing Jim Bride's latest batch of PSR patches I noticed > that gen9lp doesn't include the has_psr flag, and that our GLK > system thus reported PSR as unsupported. > > This patch simply adds has_psr. > > Signed-off-by: David Weinehall <david.weinehall@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_pci.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index 09d97e0990b7..11f0e8aa1fe4 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -377,6 +377,7 @@ static const struct intel_device_info intel_skylake_gt3_info = { > .has_ddi = 1, \ > .has_fpga_dbg = 1, \ > .has_fbc = 1, \ > + .has_psr = 1, \ > .has_runtime_pm = 1, \ > .has_pooled_eu = 0, \ > .has_csr = 1, \ > -- > 2.14.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Tue, Aug 08, 2017 at 12:50:51PM -0700, Rodrigo Vivi wrote: > a long time ago I had agreed with Daniel that we would only add new > platforms after it was enabled by default on previous platforms. > a big reason for that is that we was willing to reduce the platforms > to validate and do better validation one by one before enabling. > > However now I believe it would be beneficial to have that supported > added so we can get more brave people using in different platforms so > we could capture more corner cases before we enable it by default. > Also we can still enable by default one platform at time if needed. > > So: > > Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > I also checked the spec to see if there was anything else new or > different for these platforms and didn't find anything so: > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > But let's wait a bit to merge to give Daniel or others a time to nack ;) A bit more testing shows that while our GLK systems work perfectly fine with PSR (and gets the expected power savings), the BXT system we tested on didn't cope quite so well. I'll have to dig into this a bit to see if there's something Broxton-related info on PSR in Bspec I missed, or if it's just our BXT-P RVP that's buggy. Kind regards, David > Cheers, > Rodrigo. > > > On Tue, Aug 8, 2017 at 3:09 AM, David Weinehall > <david.weinehall@linux.intel.com> wrote: > > While testing Jim Bride's latest batch of PSR patches I noticed > > that gen9lp doesn't include the has_psr flag, and that our GLK > > system thus reported PSR as unsupported. > > > > This patch simply adds has_psr. > > > > Signed-off-by: David Weinehall <david.weinehall@linux.intel.com> > > --- > > drivers/gpu/drm/i915/i915_pci.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > > index 09d97e0990b7..11f0e8aa1fe4 100644 > > --- a/drivers/gpu/drm/i915/i915_pci.c > > +++ b/drivers/gpu/drm/i915/i915_pci.c > > @@ -377,6 +377,7 @@ static const struct intel_device_info intel_skylake_gt3_info = { > > .has_ddi = 1, \ > > .has_fpga_dbg = 1, \ > > .has_fbc = 1, \ > > + .has_psr = 1, \ > > .has_runtime_pm = 1, \ > > .has_pooled_eu = 0, \ > > .has_csr = 1, \ > > -- > > 2.14.0 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > Rodrigo Vivi > Blog: http://blog.vivi.eng.br
On Tue, Aug 08, 2017 at 12:50:51PM -0700, Rodrigo Vivi wrote: > a long time ago I had agreed with Daniel that we would only add new > platforms after it was enabled by default on previous platforms. > a big reason for that is that we was willing to reduce the platforms > to validate and do better validation one by one before enabling. > > However now I believe it would be beneficial to have that supported > added so we can get more brave people using in different platforms so > we could capture more corner cases before we enable it by default. > Also we can still enable by default one platform at time if needed. > > So: > > Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > I also checked the spec to see if there was anything else new or > different for these platforms and didn't find anything so: > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > But let's wait a bit to merge to give Daniel or others a time to nack ;) An update: while testing revealed that our BXT-P RVP doesn't work with PSR, the GLK definitely does. CI would like to do PSR testing on GLK, which obviously isn't possible if PSR is reported as unsupported on GLK. Based on BSpec alone the PSR failure on BXT-P shouldn't be a Broxton/Apollo Lake issue, but rather an issue with the RVP board (or the panel), so I'd say that this patch still makes sense. After all it only changes gen9lp to report that they *can* support PSR (thus allowing for testing of PSR on such platforms), it doesn't enable it by default. So I'd like to nudge once more that this patch be merged. Daniel, any objections? Kind regards, David Weinehall
On Wed, Sep 27, 2017 at 5:14 AM David Weinehall < david.weinehall@linux.intel.com> wrote: > On Tue, Aug 08, 2017 at 12:50:51PM -0700, Rodrigo Vivi wrote: > > a long time ago I had agreed with Daniel that we would only add new > > platforms after it was enabled by default on previous platforms. > > a big reason for that is that we was willing to reduce the platforms > > to validate and do better validation one by one before enabling. > > > > However now I believe it would be beneficial to have that supported > > added so we can get more brave people using in different platforms so > > we could capture more corner cases before we enable it by default. > > Also we can still enable by default one platform at time if needed. > > > > So: > > > > Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > > > I also checked the spec to see if there was anything else new or > > different for these platforms and didn't find anything so: > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > > > But let's wait a bit to merge to give Daniel or others a time to nack ;) > > An update: while testing revealed that our BXT-P RVP doesn't work with > PSR, the GLK definitely does. CI would like to do PSR testing on GLK, > which obviously isn't possible if PSR is reported as unsupported on GLK. > > Based on BSpec alone the PSR failure on BXT-P shouldn't be a > Broxton/Apollo Lake issue, but rather an issue with the RVP board > (or the panel), so I'd say that this patch still makes sense. It would be very important if we could narrow down the issue on BXT. Panel?! Bios?! Missing Workaround? Different user space? One of the biggest problem with PSR is that when it works well in all machines we have and we enable it we end up finding someone in the community with a machine that does not work well. We have an opportunity to investigate and understand very well what are the issues on this BXT. We shouldn't loose track of it. And maybe adding that to CI we will be forced to record the bug! ;) > > After all it only changes gen9lp to report that they *can* support PSR > (thus allowing for testing of PSR on such platforms), it doesn't enable > it by default. > > So I'd like to nudge once more that this patch be merged. I agree. Let's add it. Also good to enable on CNL as well. If the panel that you have there on CNL that is on CI doesn't support it you are about to recurve some panels that does support PSR2. > Daniel, any objections? > > > Kind regards, David Weinehall >
On Thu, Sep 28, 2017 at 04:20:29AM +0000, Rodrigo Vivi wrote: > On Wed, Sep 27, 2017 at 5:14 AM David Weinehall < > david.weinehall@linux.intel.com> wrote: > > > On Tue, Aug 08, 2017 at 12:50:51PM -0700, Rodrigo Vivi wrote: > > > a long time ago I had agreed with Daniel that we would only add new > > > platforms after it was enabled by default on previous platforms. > > > a big reason for that is that we was willing to reduce the platforms > > > to validate and do better validation one by one before enabling. > > > > > > However now I believe it would be beneficial to have that supported > > > added so we can get more brave people using in different platforms so > > > we could capture more corner cases before we enable it by default. > > > Also we can still enable by default one platform at time if needed. > > > > > > So: > > > > > > Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > > > > > I also checked the spec to see if there was anything else new or > > > different for these platforms and didn't find anything so: > > > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > > > > > But let's wait a bit to merge to give Daniel or others a time to nack ;) > > > > An update: while testing revealed that our BXT-P RVP doesn't work with > > PSR, the GLK definitely does. CI would like to do PSR testing on GLK, > > which obviously isn't possible if PSR is reported as unsupported on GLK. > > > > Based on BSpec alone the PSR failure on BXT-P shouldn't be a > > Broxton/Apollo Lake issue, but rather an issue with the RVP board > > (or the panel), so I'd say that this patch still makes sense. > > > It would be very important if we could narrow down the issue on BXT. > Panel?! Bios?! Missing Workaround? Different user space? Agreed. I haven't been able to find any newer BIOS for that device, the user space should be the same. Missing workaround might well be the case, and the panel is definitely not the same as the one the GLK has. We have several other panels that could be tested with though. > One of the biggest problem with PSR is that when it works well in all > machines we have and we enable it we end up finding someone in the > community with a machine that does not work well. "Luckily" I own one of those machines :P > We have an opportunity to investigate and understand very well what > are the issues on this BXT. We shouldn't loose track of it. That opportunity is now rapidly fleeing, since the HW in question is a BXT B0, for which the "drop workarounds" patch series has already been submitted and gotten a R-B. > And maybe adding that to CI we will be forced to record the bug! ;) > > > > > After all it only changes gen9lp to report that they *can* support PSR > > (thus allowing for testing of PSR on such platforms), it doesn't enable > > it by default. > > > > So I'd like to nudge once more that this patch be merged. > > I agree. Let's add it. Also good to enable on CNL as well. If the panel > that you have there on CNL that is on CI doesn't support it you are about > to recurve some panels that does support PSR2. Yeah, enabling on CNL too makes sense and getting systematic PSR2 testing would be awesome. "recurve" => "receive"? Kind regards, David
On Thu, Sep 28, 2017 at 10:51:42AM +0000, David Weinehall wrote: > On Thu, Sep 28, 2017 at 04:20:29AM +0000, Rodrigo Vivi wrote: > > On Wed, Sep 27, 2017 at 5:14 AM David Weinehall < > > david.weinehall@linux.intel.com> wrote: > > > > > On Tue, Aug 08, 2017 at 12:50:51PM -0700, Rodrigo Vivi wrote: > > > > a long time ago I had agreed with Daniel that we would only add new > > > > platforms after it was enabled by default on previous platforms. > > > > a big reason for that is that we was willing to reduce the platforms > > > > to validate and do better validation one by one before enabling. > > > > > > > > However now I believe it would be beneficial to have that supported > > > > added so we can get more brave people using in different platforms so > > > > we could capture more corner cases before we enable it by default. > > > > Also we can still enable by default one platform at time if needed. > > > > > > > > So: > > > > > > > > Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > > > > > > > I also checked the spec to see if there was anything else new or > > > > different for these platforms and didn't find anything so: > > > > > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > > > > > > > But let's wait a bit to merge to give Daniel or others a time to nack ;) > > > > > > An update: while testing revealed that our BXT-P RVP doesn't work with > > > PSR, the GLK definitely does. CI would like to do PSR testing on GLK, > > > which obviously isn't possible if PSR is reported as unsupported on GLK. > > > > > > Based on BSpec alone the PSR failure on BXT-P shouldn't be a > > > Broxton/Apollo Lake issue, but rather an issue with the RVP board > > > (or the panel), so I'd say that this patch still makes sense. > > > > > > It would be very important if we could narrow down the issue on BXT. > > Panel?! Bios?! Missing Workaround? Different user space? > > Agreed. I haven't been able to find any newer BIOS for that device, > the user space should be the same. > > Missing workaround might well be the case, and the panel is definitely > not the same as the one the GLK has. We have several other panels that > could be tested with though. > > > One of the biggest problem with PSR is that when it works well in all > > machines we have and we enable it we end up finding someone in the > > community with a machine that does not work well. > > "Luckily" I own one of those machines :P > > > We have an opportunity to investigate and understand very well what > > are the issues on this BXT. We shouldn't loose track of it. > > That opportunity is now rapidly fleeing, since the HW in > question is a BXT B0, for which the "drop workarounds" patch series > has already been submitted and gotten a R-B. Agree. But since it was a while ago I was trying to hit CI retest on that, but I couldn't. So could you please resubmit? I just want to see if that will cause some noise that will force us to file a bug so CI doesn't start flip-floping again because of this. > > > And maybe adding that to CI we will be forced to record the bug! ;) > > > > > > > > After all it only changes gen9lp to report that they *can* support PSR > > > (thus allowing for testing of PSR on such platforms), it doesn't enable > > > it by default. > > > > > > So I'd like to nudge once more that this patch be merged. > > > > I agree. Let's add it. Also good to enable on CNL as well. If the panel > > that you have there on CNL that is on CI doesn't support it you are about > > to recurve some panels that does support PSR2. > > Yeah, enabling on CNL too makes sense and getting systematic PSR2 testing > would be awesome. nevermind... on another review I notice cnl is already there imported from HSW_FEATURES. > > "recurve" => "receive"? yeap... (phone auto-corrector believe recurve is the best option for recieve than receive :)) Thanks, Rodrigo. > > > Kind regards, David
On Thu, Sep 28, 2017 at 08:19:29PM -0000, Patchwork wrote: > == Series Details == > > Series: drm/i915: Add has_psr-flag to gen9lp > URL : https://patchwork.freedesktop.org/series/28488/ > State : success > > == Summary == > > Series 28488v1 drm/i915: Add has_psr-flag to gen9lp > https://patchwork.freedesktop.org/api/1.0/series/28488/revisions/1/mbox/ > > Test kms_psr_sink_crc: > Subgroup psr_basic: > skip -> PASS (fi-glk-1) This seems relevant, and promising. Kind regards, David
On Fri, Sep 29, 2017 at 12:32:10PM +0000, David Weinehall wrote: > On Thu, Sep 28, 2017 at 08:19:29PM -0000, Patchwork wrote: > > == Series Details == > > > > Series: drm/i915: Add has_psr-flag to gen9lp > > URL : https://patchwork.freedesktop.org/series/28488/ > > State : success > > > > == Summary == > > > > Series 28488v1 drm/i915: Add has_psr-flag to gen9lp > > https://patchwork.freedesktop.org/api/1.0/series/28488/revisions/1/mbox/ > > > > Test kms_psr_sink_crc: > > Subgroup psr_basic: > > skip -> PASS (fi-glk-1) > > This seems relevant, and promising. merged to dinq. Thanks for the patch. > > > Kind regards, David > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 09d97e0990b7..11f0e8aa1fe4 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -377,6 +377,7 @@ static const struct intel_device_info intel_skylake_gt3_info = { .has_ddi = 1, \ .has_fpga_dbg = 1, \ .has_fbc = 1, \ + .has_psr = 1, \ .has_runtime_pm = 1, \ .has_pooled_eu = 0, \ .has_csr = 1, \
While testing Jim Bride's latest batch of PSR patches I noticed that gen9lp doesn't include the has_psr flag, and that our GLK system thus reported PSR as unsupported. This patch simply adds has_psr. Signed-off-by: David Weinehall <david.weinehall@linux.intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 1 + 1 file changed, 1 insertion(+)