From patchwork Wed Aug 9 11:48:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tobias Jakobi X-Patchwork-Id: 9890415 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E384860384 for ; Wed, 9 Aug 2017 11:50:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C890928A60 for ; Wed, 9 Aug 2017 11:50:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BDA7E28A68; Wed, 9 Aug 2017 11:50:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5256828A60 for ; Wed, 9 Aug 2017 11:50:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A743A6E2D3; Wed, 9 Aug 2017 11:50:56 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp.math.uni-bielefeld.de (smtp.math.uni-bielefeld.de [129.70.45.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id EAF5C6E2D3 for ; Wed, 9 Aug 2017 11:50:54 +0000 (UTC) Received: from chidori.dhcp.uni-bielefeld.de (dhcp41-231.math.uni-bielefeld.de [129.70.41.231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (Client did not present a certificate) by smtp.math.uni-bielefeld.de (Postfix) with ESMTPSA id 3644960A6B; Wed, 9 Aug 2017 13:50:52 +0200 (CEST) From: Tobias Jakobi To: linux-samsung-soc@vger.kernel.org Subject: [PATCH 5/8] drm/exynos: introduce BYTE_PITCH capability Date: Wed, 9 Aug 2017 13:48:54 +0200 Message-Id: <20170809114857.4945-6-tjakobi@math.uni-bielefeld.de> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170809114857.4945-1-tjakobi@math.uni-bielefeld.de> References: <20170809114857.4945-1-tjakobi@math.uni-bielefeld.de> Cc: Tobias Jakobi , dri-devel@lists.freedesktop.org, m.szyprowski@samsung.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP In some of drivers we compute something like 'pitch / cpp' at some point, silently assuming that the pitch (which is in bytes) is divisible by the buffer's cpp. This is not always true, in particular DRM core does not check for pitch alignment in the common case. Introduce a new cap which indicates that the hardware supports a pitch with 'byte-granularity'. If the cap is not set, assume that we need pitch aligned to cpp. We set this cap later for the drivers/planes that support it. Signed-off-by: Tobias Jakobi --- drivers/gpu/drm/exynos/exynos_drm_drv.h | 1 + drivers/gpu/drm/exynos/exynos_drm_plane.c | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index 43afab4bebc3..ec32632485d2 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h @@ -92,6 +92,7 @@ struct exynos_drm_plane { #define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1) #define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2) #define EXYNOS_DRM_PLANE_CAP_TILE (1 << 3) +#define EXYNOS_DRM_PLANE_CAP_BYTE_PITCH (1 << 4) /* * Exynos DRM plane configuration structure. diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index bd3825617b06..734d5ba4eb99 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c @@ -185,6 +185,16 @@ exynos_drm_plane_check_format(const struct exynos_drm_plane_config *config, { struct drm_framebuffer *fb = state->base.fb; + /* + * Some blocks only allow to specify a buffer pitch in terms + * of pixels. In these cases, we need to ensure that the pitch + * provided by userspace is divisible by the cpp. + */ + if (!(config->capabilities & EXYNOS_DRM_PLANE_CAP_BYTE_PITCH)) { + if (fb->pitches[0] % fb->format->cpp[0]) + return -ENOTSUPP; + } + switch (fb->modifier) { case DRM_FORMAT_MOD_SAMSUNG_64_32_TILE: if (!(config->capabilities & EXYNOS_DRM_PLANE_CAP_TILE))