From patchwork Thu Aug 17 21:04:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Anholt X-Patchwork-Id: 9907153 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C56306024A for ; Thu, 17 Aug 2017 21:09:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B5AA228534 for ; Thu, 17 Aug 2017 21:09:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A8E862866B; Thu, 17 Aug 2017 21:09:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0280828534 for ; Thu, 17 Aug 2017 21:09:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 39C6388401; Thu, 17 Aug 2017 21:09:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from anholt.net (anholt.net [50.246.234.109]) by gabe.freedesktop.org (Postfix) with ESMTP id 8D6006E64F for ; Thu, 17 Aug 2017 21:09:06 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by anholt.net (Postfix) with ESMTP id 52CDC10A13F0; Thu, 17 Aug 2017 14:09:06 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at anholt.net Received: from anholt.net ([127.0.0.1]) by localhost (kingsolver.anholt.net [127.0.0.1]) (amavisd-new, port 10024) with LMTP id xNcVd8wnMH4H; Thu, 17 Aug 2017 14:09:05 -0700 (PDT) Received: from eliezer.anholt.net (localhost [127.0.0.1]) by anholt.net (Postfix) with ESMTP id 23EA910A053F; Thu, 17 Aug 2017 14:09:05 -0700 (PDT) Received: by eliezer.anholt.net (Postfix, from userid 1000) id 55A5A2E74BE; Thu, 17 Aug 2017 14:04:55 -0700 (PDT) From: Eric Anholt To: dri-devel@lists.freedesktop.org Subject: [PATCH] drm/vc4: Fix sleeps during the IRQ handler for DSI transactions. Date: Thu, 17 Aug 2017 14:04:55 -0700 Message-Id: <20170817210455.17885-1-eric@anholt.net> X-Mailer: git-send-email 2.14.1 Cc: linux-kernel@vger.kernel.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP VC4's DSI1 has a bug where the AXI connection is broken for 32-bit writes from the CPU, so we use the DMA engine to DMA 32-bit values into registers instead. That sleeps, so we can't do it from the top half. As a solution (suggested by Arnd), we can mask the IRQ in the irqchip in the top half, and re-enable it from an irqthread. Signed-off-by: Eric Anholt --- drivers/gpu/drm/vc4/vc4_dsi.c | 39 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 37 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_dsi.c b/drivers/gpu/drm/vc4/vc4_dsi.c index ec1d646b3151..9556236b67d0 100644 --- a/drivers/gpu/drm/vc4/vc4_dsi.c +++ b/drivers/gpu/drm/vc4/vc4_dsi.c @@ -516,6 +516,8 @@ struct vc4_dsi { /* Whether we're on bcm2835's DSI0 or DSI1. */ int port; + int irq; + /* DSI channel for the panel we're connected to. */ u32 channel; u32 lanes; @@ -1360,6 +1362,28 @@ static void dsi_handle_error(struct vc4_dsi *dsi, *ret = IRQ_HANDLED; } +/* Initial handler for port 1 where we need the reg_dma workaround. + * The register DMA writes sleep, so we can't do it in the top half. + * Instead we just disable the interrupt in the only way we have + * available (mask it in the irqchip), and continue on to the threaded + * handler. + */ +static irqreturn_t vc4_dsi_irq_defer_to_thread_handler(int irq, void *data) +{ + struct vc4_dsi *dsi = data; + u32 stat = DSI_PORT_READ(INT_STAT); + + if (!stat) + return IRQ_NONE; + + disable_irq_nosync(dsi->irq); + + return IRQ_WAKE_THREAD; +} + +/* Normal IRQ handler for port 0, or the threaded IRQ handler for port + * 1 where we need the reg_dma workaround. + */ static irqreturn_t vc4_dsi_irq_handler(int irq, void *data) { struct vc4_dsi *dsi = data; @@ -1368,6 +1392,9 @@ static irqreturn_t vc4_dsi_irq_handler(int irq, void *data) DSI_PORT_WRITE(INT_STAT, stat); + if (dsi->reg_dma_mem) + enable_irq(dsi->irq); + dsi_handle_error(dsi, &ret, stat, DSI1_INT_ERR_SYNC_ESC, "LPDT sync"); dsi_handle_error(dsi, &ret, stat, @@ -1539,8 +1566,16 @@ static int vc4_dsi_bind(struct device *dev, struct device *master, void *data) /* Clear any existing interrupt state. */ DSI_PORT_WRITE(INT_STAT, DSI_PORT_READ(INT_STAT)); - ret = devm_request_irq(dev, platform_get_irq(pdev, 0), - vc4_dsi_irq_handler, 0, "vc4 dsi", dsi); + dsi->irq = platform_get_irq(pdev, 0); + if (dsi->reg_dma_mem) { + ret = devm_request_threaded_irq(dev, dsi->irq, + vc4_dsi_irq_defer_to_thread_handler, + vc4_dsi_irq_handler, 0, + "vc4 dsi", dsi); + } else { + ret = devm_request_irq(dev, dsi->irq, + vc4_dsi_irq_handler, 0, "vc4 dsi", dsi); + } if (ret) { if (ret != -EPROBE_DEFER) dev_err(dev, "Failed to get interrupt: %d\n", ret);