diff mbox

[v4,6/9] drm/i915/guc: Fix GuC cleanup in unload path

Message ID 1505929104-28823-7-git-send-email-sagar.a.kamble@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

sagar.a.kamble@intel.com Sept. 20, 2017, 5:38 p.m. UTC
We ensure that GuC is completely suspended and client is destroyed
in i915_gem_suspend during i915_driver_unload. So now intel_uc_fini_hw
should just take care of cleanup,
hence s/intel_uc_fini_hw/intel_uc_cleanup. Correspondingly
we also updated as s/i915_guc_submission_fini/i915_guc_submission_cleanup
Other functionality to disable communication, disable interrupts and
update of ggtt.invalidate is taken care by intel_uc_suspend.
With this patch we are also doing guc_free_load_err_log only
if i915.enable_guc_loading is set.
Created intel_guc_cleanup function to wrap the cleanup functions
specific to GuC.

v2: Rebase w.r.t removal of GuC code restructuring.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c            |  2 +-
 drivers/gpu/drm/i915/i915_guc_submission.c |  2 +-
 drivers/gpu/drm/i915/intel_uc.c            | 21 +++++++++++----------
 drivers/gpu/drm/i915/intel_uc.h            |  4 ++--
 4 files changed, 15 insertions(+), 14 deletions(-)

Comments

Michal Wajdeczko Sept. 20, 2017, 9:53 p.m. UTC | #1
On Wed, 20 Sep 2017 19:38:21 +0200, Sagar Arun Kamble  
<sagar.a.kamble@intel.com> wrote:

> We ensure that GuC is completely suspended and client is destroyed
> in i915_gem_suspend during i915_driver_unload. So now intel_uc_fini_hw
> should just take care of cleanup,
> hence s/intel_uc_fini_hw/intel_uc_cleanup. Correspondingly
> we also updated as s/i915_guc_submission_fini/i915_guc_submission_cleanup
> Other functionality to disable communication, disable interrupts and
> update of ggtt.invalidate is taken care by intel_uc_suspend.
> With this patch we are also doing guc_free_load_err_log only
> if i915.enable_guc_loading is set.
> Created intel_guc_cleanup function to wrap the cleanup functions
> specific to GuC.

This last step seems to be one too far. Try again without it.

Michal

>
> v2: Rebase w.r.t removal of GuC code restructuring.
>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Michał Winiarski <michal.winiarski@intel.com>
> Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c            |  2 +-
>  drivers/gpu/drm/i915/i915_guc_submission.c |  2 +-
>  drivers/gpu/drm/i915/intel_uc.c            | 21 +++++++++++----------
>  drivers/gpu/drm/i915/intel_uc.h            |  4 ++--
>  4 files changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c  
> b/drivers/gpu/drm/i915/i915_drv.c
> index 8635f40..6f36ced 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -602,7 +602,7 @@ static void i915_gem_fini(struct drm_i915_private  
> *dev_priv)
>  	i915_gem_drain_workqueue(dev_priv);
> 	mutex_lock(&dev_priv->drm.struct_mutex);
> -	intel_uc_fini_hw(dev_priv);
> +	intel_uc_cleanup(dev_priv);
>  	i915_gem_cleanup_engines(dev_priv);
>  	i915_gem_contexts_fini(dev_priv);
>  	i915_gem_cleanup_userptr(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c  
> b/drivers/gpu/drm/i915/i915_guc_submission.c
> index 94efe32..12f1195 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -1050,7 +1050,7 @@ int i915_guc_submission_init(struct  
> drm_i915_private *dev_priv)
>  	return ret;
>  }
> -void i915_guc_submission_fini(struct drm_i915_private *dev_priv)
> +void i915_guc_submission_cleanup(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_guc *guc = &dev_priv->guc;
> diff --git a/drivers/gpu/drm/i915/intel_uc.c  
> b/drivers/gpu/drm/i915/intel_uc.c
> index aac8526..8c42344 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -418,7 +418,7 @@ int intel_uc_init_hw(struct drm_i915_private  
> *dev_priv)
>  	guc_capture_load_err_log(guc);
>  err_submission:
>  	if (i915.enable_guc_submission)
> -		i915_guc_submission_fini(dev_priv);
> +		i915_guc_submission_cleanup(dev_priv);
>  err_guc:
>  	i915_ggtt_disable_guc(dev_priv);
> @@ -439,21 +439,22 @@ int intel_uc_init_hw(struct drm_i915_private  
> *dev_priv)
>  	return ret;
>  }
> -void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
> +static void intel_guc_cleanup(struct intel_guc *guc)
>  {
> -	guc_free_load_err_log(&dev_priv->guc);
> +	struct drm_i915_private *dev_priv = guc_to_i915(guc);
> +
> +	if (i915.enable_guc_submission)
> +		i915_guc_submission_cleanup(dev_priv);
> +}
> +void intel_uc_cleanup(struct drm_i915_private *dev_priv)
> +{
>  	if (!i915.enable_guc_loading)
>  		return;
> -	guc_disable_communication(&dev_priv->guc);
> -
> -	if (i915.enable_guc_submission) {
> -		gen9_disable_guc_interrupts(dev_priv);
> -		i915_guc_submission_fini(dev_priv);
> -	}
> +	guc_free_load_err_log(&dev_priv->guc);
> -	i915_ggtt_disable_guc(dev_priv);
> +	intel_guc_cleanup(&dev_priv->guc);
>  }
> int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len)
> diff --git a/drivers/gpu/drm/i915/intel_uc.h  
> b/drivers/gpu/drm/i915/intel_uc.h
> index 069c2b2..8557e33 100644
> --- a/drivers/gpu/drm/i915/intel_uc.h
> +++ b/drivers/gpu/drm/i915/intel_uc.h
> @@ -207,7 +207,7 @@ struct intel_huc {
>  void intel_uc_init_fw(struct drm_i915_private *dev_priv);
>  void intel_uc_fini_fw(struct drm_i915_private *dev_priv);
>  int intel_uc_init_hw(struct drm_i915_private *dev_priv);
> -void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
> +void intel_uc_cleanup(struct drm_i915_private *dev_priv);
>  int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv);
>  int intel_uc_runtime_resume(struct drm_i915_private *dev_priv);
>  int intel_uc_suspend(struct drm_i915_private *dev_priv);
> @@ -236,7 +236,7 @@ static inline void intel_guc_notify(struct intel_guc  
> *guc)
>  int i915_guc_submission_init(struct drm_i915_private *dev_priv);
>  int i915_guc_submission_enable(struct drm_i915_private *dev_priv);
>  void i915_guc_submission_disable(struct drm_i915_private *dev_priv);
> -void i915_guc_submission_fini(struct drm_i915_private *dev_priv);
> +void i915_guc_submission_cleanup(struct drm_i915_private *dev_priv);
>  struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32  
> size);
> /* intel_guc_log.c */
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8635f40..6f36ced 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -602,7 +602,7 @@  static void i915_gem_fini(struct drm_i915_private *dev_priv)
 	i915_gem_drain_workqueue(dev_priv);
 
 	mutex_lock(&dev_priv->drm.struct_mutex);
-	intel_uc_fini_hw(dev_priv);
+	intel_uc_cleanup(dev_priv);
 	i915_gem_cleanup_engines(dev_priv);
 	i915_gem_contexts_fini(dev_priv);
 	i915_gem_cleanup_userptr(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 94efe32..12f1195 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -1050,7 +1050,7 @@  int i915_guc_submission_init(struct drm_i915_private *dev_priv)
 	return ret;
 }
 
-void i915_guc_submission_fini(struct drm_i915_private *dev_priv)
+void i915_guc_submission_cleanup(struct drm_i915_private *dev_priv)
 {
 	struct intel_guc *guc = &dev_priv->guc;
 
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index aac8526..8c42344 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -418,7 +418,7 @@  int intel_uc_init_hw(struct drm_i915_private *dev_priv)
 	guc_capture_load_err_log(guc);
 err_submission:
 	if (i915.enable_guc_submission)
-		i915_guc_submission_fini(dev_priv);
+		i915_guc_submission_cleanup(dev_priv);
 err_guc:
 	i915_ggtt_disable_guc(dev_priv);
 
@@ -439,21 +439,22 @@  int intel_uc_init_hw(struct drm_i915_private *dev_priv)
 	return ret;
 }
 
-void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
+static void intel_guc_cleanup(struct intel_guc *guc)
 {
-	guc_free_load_err_log(&dev_priv->guc);
+	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
+	if (i915.enable_guc_submission)
+		i915_guc_submission_cleanup(dev_priv);
+}
 
+void intel_uc_cleanup(struct drm_i915_private *dev_priv)
+{
 	if (!i915.enable_guc_loading)
 		return;
 
-	guc_disable_communication(&dev_priv->guc);
-
-	if (i915.enable_guc_submission) {
-		gen9_disable_guc_interrupts(dev_priv);
-		i915_guc_submission_fini(dev_priv);
-	}
+	guc_free_load_err_log(&dev_priv->guc);
 
-	i915_ggtt_disable_guc(dev_priv);
+	intel_guc_cleanup(&dev_priv->guc);
 }
 
 int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len)
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 069c2b2..8557e33 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -207,7 +207,7 @@  struct intel_huc {
 void intel_uc_init_fw(struct drm_i915_private *dev_priv);
 void intel_uc_fini_fw(struct drm_i915_private *dev_priv);
 int intel_uc_init_hw(struct drm_i915_private *dev_priv);
-void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
+void intel_uc_cleanup(struct drm_i915_private *dev_priv);
 int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv);
 int intel_uc_runtime_resume(struct drm_i915_private *dev_priv);
 int intel_uc_suspend(struct drm_i915_private *dev_priv);
@@ -236,7 +236,7 @@  static inline void intel_guc_notify(struct intel_guc *guc)
 int i915_guc_submission_init(struct drm_i915_private *dev_priv);
 int i915_guc_submission_enable(struct drm_i915_private *dev_priv);
 void i915_guc_submission_disable(struct drm_i915_private *dev_priv);
-void i915_guc_submission_fini(struct drm_i915_private *dev_priv);
+void i915_guc_submission_cleanup(struct drm_i915_private *dev_priv);
 struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
 
 /* intel_guc_log.c */