From patchwork Sun Sep 24 17:49:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harinath Nampally X-Patchwork-Id: 9968111 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 327B7602CB for ; Sun, 24 Sep 2017 17:49:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1ACBD28C59 for ; Sun, 24 Sep 2017 17:49:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0FA0F28C5C; Sun, 24 Sep 2017 17:49:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 026F928C59 for ; Sun, 24 Sep 2017 17:49:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752685AbdIXRtl (ORCPT ); Sun, 24 Sep 2017 13:49:41 -0400 Received: from mail-oi0-f68.google.com ([209.85.218.68]:33110 "EHLO mail-oi0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752624AbdIXRtl (ORCPT ); Sun, 24 Sep 2017 13:49:41 -0400 Received: by mail-oi0-f68.google.com with SMTP id z73so2414508oia.0; Sun, 24 Sep 2017 10:49:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=Cr8hw8V1AbzdvusvIUiWyfQWfVk7lNoDXMAmp5KWQWQ=; b=BTlP4NCRF6XfgMPtPpGFDC+10pgO0lVCZYGcSqGXdpukAT+0Pwtj3AMYYrB5yZKSyi Eogx1qKNEAgLYQR9YtgrvffZ3HhIvDCs5jIJzEKtEdUiTR5mL/ibIe9s+wUXIQwDjoj2 jTYj3bn+CLc5h5V3X+kEuCvrrdOssOIeCcf1ggi6+Ns7232BsAMM4ZVDI0Jy8cRdnbNA aOPZBvP/t8CQOfu/RELL8LEa9U5C4qDVq1VEkWqqU1vmgF1RUIrMh0YoHSFvAiSPJshN PjZuqP/q+4j8gJ1dxG35YMBIuMrH33SDgikw8OhxJ7JzCgEUyao82DUX4lmOfV0RXCuU us1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Cr8hw8V1AbzdvusvIUiWyfQWfVk7lNoDXMAmp5KWQWQ=; b=Y3w4+IylgMb5+z2ZSqhuK+7NHYH6mVF5Gvv30vjuP5djmygIzdZzszF01HAfX/wHcd GHZz+2e0p2E6bEf4o5WaLxKxrQcB6OxXyTBB0jDeGe3hpYeGVaRoetOalgfpKfDJTTJs tpmgSJJ5drTYwN+/RVJYMDtWEUzmPvRfGQJeIE2KfFp9+s6FVTWNdJkbFPzcBsWqRrmL PAdLptzxWmmE3V6rayAZmBwywqaC14en4F9vZlPZtIsFRvdgZCUR7XzWOFf2KVWe6+eZ dyNOR4pThBgjgKm8BXZ6m8nOZinIn28aZ7o3EwuHDoIC+1coA2MCSUcI5S4tj8jKxXGD 5lhg== X-Gm-Message-State: AHPjjUiyTL6nZABZf+a06WFpyFJgpndPYJOpe737f9seBq9qAM9qa2A6 eDsfEAuMw4JSV4b6JOc/JN8= X-Google-Smtp-Source: AOwi7QCdzrtbKotYEN/S7LjVLekVS1R/ySyMBD5Vg/0C5GZsgun4xTFK0xsWDPTpgUfx2p0dmB54qQ== X-Received: by 10.202.220.133 with SMTP id t127mr6647111oig.130.1506275380345; Sun, 24 Sep 2017 10:49:40 -0700 (PDT) Received: from hary-Aspire-X3400G.Belkin ([97.70.80.173]) by smtp.googlemail.com with ESMTPSA id l184sm6181759oig.54.2017.09.24.10.49.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 24 Sep 2017 10:49:38 -0700 (PDT) From: Harinath Nampally To: jic23@kernel.org Cc: knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, gregkh@linuxfoundation.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, amsfield22@gmail.com, martink@posteo.de Subject: [PATCH] iio: accel: mma8452: Rename structs holding event configuration registers to more appropriate names. Date: Sun, 24 Sep 2017 13:49:36 -0400 Message-Id: <1506275376-5037-1-git-send-email-harinath922@gmail.com> X-Mailer: git-send-email 2.7.4 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Improves code readability, no impact on functionality. Signed-off-by: Harinath Nampally --- drivers/iio/accel/mma8452.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 6194169..3472e7e 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -135,7 +135,7 @@ struct mma8452_event_regs { u8 ev_count; }; -static const struct mma8452_event_regs ev_regs_accel_falling = { +static const struct mma8452_event_regs ff_mt_ev_regs = { .ev_cfg = MMA8452_FF_MT_CFG, .ev_cfg_ele = MMA8452_FF_MT_CFG_ELE, .ev_cfg_chan_shift = MMA8452_FF_MT_CHAN_SHIFT, @@ -145,7 +145,7 @@ static const struct mma8452_event_regs ev_regs_accel_falling = { .ev_count = MMA8452_FF_MT_COUNT }; -static const struct mma8452_event_regs ev_regs_accel_rising = { +static const struct mma8452_event_regs trans_ev_regs = { .ev_cfg = MMA8452_TRANSIENT_CFG, .ev_cfg_ele = MMA8452_TRANSIENT_CFG_ELE, .ev_cfg_chan_shift = MMA8452_TRANSIENT_CHAN_SHIFT, @@ -777,12 +777,12 @@ static int mma8452_get_event_regs(struct mma8452_data *data, & MMA8452_INT_TRANS) && (data->chip_info->enabled_events & MMA8452_INT_TRANS)) - *ev_reg = &ev_regs_accel_rising; + *ev_reg = &trans_ev_regs; else - *ev_reg = &ev_regs_accel_falling; + *ev_reg = &ff_mt_ev_regs; return 0; case IIO_EV_DIR_FALLING: - *ev_reg = &ev_regs_accel_falling; + *ev_reg = &ff_mt_ev_regs; return 0; default: return -EINVAL;