| Message ID | 1507271849-28467-1-git-send-email-sagar.a.kamble@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 10/6/2017 12:07 PM, Sagar Arun Kamble wrote: > GTT mappings are to be suspended post i915_gem_suspend and display I think I should say this "post idling GPU and display suspend". Will update in next rev. > suspend. GPU is reset in i915_gem_suspend. This separated the HW suspend > across reset. To achieve the complete HW cleanup prior to GPU reset we > need to separate i915_gem_suspend functionality into user quiescing > and HW cleanup. With this patch new function i915_gem_quiescent And this should have been named "i915_gem_quiesce"? Chris, Joonas, does i915_gem_quiesce for user quiescing and i915_gem_suspend for HW suspend look good? > is created > that will ensure GEM is idle. i915_gem_suspend will ensure all GPU HW > operations are suspended. > > With this patch drm suspend sequence is gem_quiescent followed by > gem_suspend. Unload sequence is gem_quiescent->gem_fini->gem_suspend. > This unload sequence ensures GuC HW access to destroy client in gem_fini > succeeds. > > v2. Split i915_gem_suspend to accomodate GTT mappings suspend as that is > not to be done till display suspend. (Chris) > > Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: Michał Winiarski <michal.winiarski@intel.com> > Cc: Oscar Mateo <oscar.mateo@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_drv.c | 10 ++++++---- > drivers/gpu/drm/i915/i915_drv.h | 3 ++- > drivers/gpu/drm/i915/i915_gem.c | 34 +++++++++++++++++++++++++--------- > 3 files changed, 33 insertions(+), 14 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c > index 66fc156..875ce94 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -693,9 +693,10 @@ static int i915_load_modeset_init(struct drm_device *dev) > return 0; > > cleanup_gem: > - if (i915_gem_suspend(dev_priv)) > + if (i915_gem_quiescent(dev_priv)) > DRM_ERROR("failed to idle hardware; continuing to unload!\n"); > i915_gem_fini(dev_priv); > + i915_gem_suspend(dev_priv); > cleanup_uc: > intel_uc_fini_fw(dev_priv); > cleanup_irq: > @@ -1395,7 +1396,7 @@ void i915_driver_unload(struct drm_device *dev) > > i915_driver_unregister(dev_priv); > > - if (i915_gem_suspend(dev_priv)) > + if (i915_gem_quiescent(dev_priv)) > DRM_ERROR("failed to idle hardware; continuing to unload!\n"); > > intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); > @@ -1430,6 +1431,7 @@ void i915_driver_unload(struct drm_device *dev) > i915_reset_error_state(dev_priv); > > i915_gem_fini(dev_priv); > + i915_gem_suspend(dev_priv); > intel_uc_fini_fw(dev_priv); > intel_fbc_cleanup_cfb(dev_priv); > > @@ -1540,7 +1542,7 @@ static int i915_drm_suspend(struct drm_device *dev) > > pci_save_state(pdev); > > - error = i915_gem_suspend(dev_priv); > + error = i915_gem_quiescent(dev_priv); > if (error) { > dev_err(&pdev->dev, > "GEM idle failed, resume might fail\n"); > @@ -1558,7 +1560,7 @@ static int i915_drm_suspend(struct drm_device *dev) > > intel_suspend_hw(dev_priv); > > - i915_gem_suspend_gtt_mappings(dev_priv); > + i915_gem_suspend(dev_priv); > > i915_save_state(dev_priv); > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 1fc7080..982e37e 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -3688,7 +3688,8 @@ void i915_gem_reset_engine(struct intel_engine_cs *engine, > void i915_gem_cleanup_engines(struct drm_i915_private *dev_priv); > int i915_gem_wait_for_idle(struct drm_i915_private *dev_priv, > unsigned int flags); > -int __must_check i915_gem_suspend(struct drm_i915_private *dev_priv); > +int __must_check i915_gem_quiescent(struct drm_i915_private *dev_priv); > +void i915_gem_suspend(struct drm_i915_private *dev_priv); > void i915_gem_resume(struct drm_i915_private *dev_priv); > int i915_gem_fault(struct vm_fault *vmf); > int i915_gem_object_wait(struct drm_i915_gem_object *obj, > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index ab8c694..d5ca218 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -4507,13 +4507,12 @@ void i915_gem_sanitize(struct drm_i915_private *i915) > } > } > > -int i915_gem_suspend(struct drm_i915_private *dev_priv) > +int i915_gem_quiescent(struct drm_i915_private *dev_priv) > { > struct drm_device *dev = &dev_priv->drm; > int ret; > > intel_runtime_pm_get(dev_priv); > - intel_suspend_gt_powersave(dev_priv); > > mutex_lock(&dev->struct_mutex); > > @@ -4539,8 +4538,6 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) > i915_gem_contexts_lost(dev_priv); > mutex_unlock(&dev->struct_mutex); > > - intel_guc_suspend(dev_priv); > - > cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work); > cancel_delayed_work_sync(&dev_priv->gt.retire_work); > > @@ -4557,6 +4554,29 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) > if (WARN_ON(!intel_engines_are_idle(dev_priv))) > i915_gem_set_wedged(dev_priv); /* no hope, discard everything */ > > + intel_runtime_pm_put(dev_priv); > + return 0; > + > +err_unlock: > + mutex_unlock(&dev->struct_mutex); > + > + intel_runtime_pm_put(dev_priv); > + return ret; > +} > + > +void i915_gem_suspend(struct drm_i915_private *dev_priv) > +{ > + struct drm_device *dev = &dev_priv->drm; > + > + intel_runtime_pm_get(dev_priv); > + intel_suspend_gt_powersave(dev_priv); > + > + mutex_lock(&dev->struct_mutex); > + > + i915_gem_suspend_gtt_mappings(dev_priv); > + > + intel_guc_suspend(dev_priv); > + > /* > * Neither the BIOS, ourselves or any other kernel > * expects the system to be in execlists mode on startup, > @@ -4578,13 +4598,9 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) > */ > i915_gem_sanitize(dev_priv); > > - intel_runtime_pm_put(dev_priv); > - return 0; > - > -err_unlock: > mutex_unlock(&dev->struct_mutex); > + > intel_runtime_pm_put(dev_priv); > - return ret; > } > > void i915_gem_resume(struct drm_i915_private *dev_priv)
On Fri, 2017-10-06 at 13:39 +0530, Sagar Arun Kamble wrote: > > On 10/6/2017 12:07 PM, Sagar Arun Kamble wrote: > > GTT mappings are to be suspended post i915_gem_suspend and display > > I think I should say this "post idling GPU and display suspend". Will > update in next rev. > > suspend. GPU is reset in i915_gem_suspend. This separated the HW suspend > > across reset. To achieve the complete HW cleanup prior to GPU reset we > > need to separate i915_gem_suspend functionality into user quiescing > > and HW cleanup. With this patch new function i915_gem_quiescent > > And this should have been named "i915_gem_quiesce"? > Chris, Joonas, does i915_gem_quiesce for user quiescing and > i915_gem_suspend for HW suspend look good? The BAT results seemed quite negative. Regards, Joonas
On 10/12/2017 2:43 PM, Joonas Lahtinen wrote: > On Fri, 2017-10-06 at 13:39 +0530, Sagar Arun Kamble wrote: >> On 10/6/2017 12:07 PM, Sagar Arun Kamble wrote: >>> GTT mappings are to be suspended post i915_gem_suspend and display >> I think I should say this "post idling GPU and display suspend". Will >> update in next rev. >>> suspend. GPU is reset in i915_gem_suspend. This separated the HW suspend >>> across reset. To achieve the complete HW cleanup prior to GPU reset we >>> need to separate i915_gem_suspend functionality into user quiescing >>> and HW cleanup. With this patch new function i915_gem_quiescent >> And this should have been named "i915_gem_quiesce"? >> Chris, Joonas, does i915_gem_quiesce for user quiescing and >> i915_gem_suspend for HW suspend look good? > The BAT results seemed quite negative. Yes. Addressed as part of GEM/GuC fixes series. > > Regards, Joonas
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 66fc156..875ce94 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -693,9 +693,10 @@ static int i915_load_modeset_init(struct drm_device *dev) return 0; cleanup_gem: - if (i915_gem_suspend(dev_priv)) + if (i915_gem_quiescent(dev_priv)) DRM_ERROR("failed to idle hardware; continuing to unload!\n"); i915_gem_fini(dev_priv); + i915_gem_suspend(dev_priv); cleanup_uc: intel_uc_fini_fw(dev_priv); cleanup_irq: @@ -1395,7 +1396,7 @@ void i915_driver_unload(struct drm_device *dev) i915_driver_unregister(dev_priv); - if (i915_gem_suspend(dev_priv)) + if (i915_gem_quiescent(dev_priv)) DRM_ERROR("failed to idle hardware; continuing to unload!\n"); intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); @@ -1430,6 +1431,7 @@ void i915_driver_unload(struct drm_device *dev) i915_reset_error_state(dev_priv); i915_gem_fini(dev_priv); + i915_gem_suspend(dev_priv); intel_uc_fini_fw(dev_priv); intel_fbc_cleanup_cfb(dev_priv); @@ -1540,7 +1542,7 @@ static int i915_drm_suspend(struct drm_device *dev) pci_save_state(pdev); - error = i915_gem_suspend(dev_priv); + error = i915_gem_quiescent(dev_priv); if (error) { dev_err(&pdev->dev, "GEM idle failed, resume might fail\n"); @@ -1558,7 +1560,7 @@ static int i915_drm_suspend(struct drm_device *dev) intel_suspend_hw(dev_priv); - i915_gem_suspend_gtt_mappings(dev_priv); + i915_gem_suspend(dev_priv); i915_save_state(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 1fc7080..982e37e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -3688,7 +3688,8 @@ void i915_gem_reset_engine(struct intel_engine_cs *engine, void i915_gem_cleanup_engines(struct drm_i915_private *dev_priv); int i915_gem_wait_for_idle(struct drm_i915_private *dev_priv, unsigned int flags); -int __must_check i915_gem_suspend(struct drm_i915_private *dev_priv); +int __must_check i915_gem_quiescent(struct drm_i915_private *dev_priv); +void i915_gem_suspend(struct drm_i915_private *dev_priv); void i915_gem_resume(struct drm_i915_private *dev_priv); int i915_gem_fault(struct vm_fault *vmf); int i915_gem_object_wait(struct drm_i915_gem_object *obj, diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index ab8c694..d5ca218 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4507,13 +4507,12 @@ void i915_gem_sanitize(struct drm_i915_private *i915) } } -int i915_gem_suspend(struct drm_i915_private *dev_priv) +int i915_gem_quiescent(struct drm_i915_private *dev_priv) { struct drm_device *dev = &dev_priv->drm; int ret; intel_runtime_pm_get(dev_priv); - intel_suspend_gt_powersave(dev_priv); mutex_lock(&dev->struct_mutex); @@ -4539,8 +4538,6 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) i915_gem_contexts_lost(dev_priv); mutex_unlock(&dev->struct_mutex); - intel_guc_suspend(dev_priv); - cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work); cancel_delayed_work_sync(&dev_priv->gt.retire_work); @@ -4557,6 +4554,29 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) if (WARN_ON(!intel_engines_are_idle(dev_priv))) i915_gem_set_wedged(dev_priv); /* no hope, discard everything */ + intel_runtime_pm_put(dev_priv); + return 0; + +err_unlock: + mutex_unlock(&dev->struct_mutex); + + intel_runtime_pm_put(dev_priv); + return ret; +} + +void i915_gem_suspend(struct drm_i915_private *dev_priv) +{ + struct drm_device *dev = &dev_priv->drm; + + intel_runtime_pm_get(dev_priv); + intel_suspend_gt_powersave(dev_priv); + + mutex_lock(&dev->struct_mutex); + + i915_gem_suspend_gtt_mappings(dev_priv); + + intel_guc_suspend(dev_priv); + /* * Neither the BIOS, ourselves or any other kernel * expects the system to be in execlists mode on startup, @@ -4578,13 +4598,9 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv) */ i915_gem_sanitize(dev_priv); - intel_runtime_pm_put(dev_priv); - return 0; - -err_unlock: mutex_unlock(&dev->struct_mutex); + intel_runtime_pm_put(dev_priv); - return ret; } void i915_gem_resume(struct drm_i915_private *dev_priv)
GTT mappings are to be suspended post i915_gem_suspend and display suspend. GPU is reset in i915_gem_suspend. This separated the HW suspend across reset. To achieve the complete HW cleanup prior to GPU reset we need to separate i915_gem_suspend functionality into user quiescing and HW cleanup. With this patch new function i915_gem_quiescent is created that will ensure GEM is idle. i915_gem_suspend will ensure all GPU HW operations are suspended. With this patch drm suspend sequence is gem_quiescent followed by gem_suspend. Unload sequence is gem_quiescent->gem_fini->gem_suspend. This unload sequence ensures GuC HW access to destroy client in gem_fini succeeds. v2. Split i915_gem_suspend to accomodate GTT mappings suspend as that is not to be done till display suspend. (Chris) Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Michał Winiarski <michal.winiarski@intel.com> Cc: Oscar Mateo <oscar.mateo@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- drivers/gpu/drm/i915/i915_drv.c | 10 ++++++---- drivers/gpu/drm/i915/i915_drv.h | 3 ++- drivers/gpu/drm/i915/i915_gem.c | 34 +++++++++++++++++++++++++--------- 3 files changed, 33 insertions(+), 14 deletions(-)