From patchwork Tue Oct 10 18:02:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Lezcano X-Patchwork-Id: 9996877 X-Patchwork-Delegate: eduardo.valentin@ti.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4CF6760216 for ; Tue, 10 Oct 2017 18:04:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 426FD286C6 for ; Tue, 10 Oct 2017 18:04:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3732E286F7; Tue, 10 Oct 2017 18:04:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2CA4F286C6 for ; Tue, 10 Oct 2017 18:04:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756353AbdJJSEu (ORCPT ); Tue, 10 Oct 2017 14:04:50 -0400 Received: from mail-wm0-f52.google.com ([74.125.82.52]:57149 "EHLO mail-wm0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756288AbdJJSEt (ORCPT ); Tue, 10 Oct 2017 14:04:49 -0400 Received: by mail-wm0-f52.google.com with SMTP id l68so7682935wmd.5 for ; Tue, 10 Oct 2017 11:04:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/+R8+WARc0bg2kwO5tllsXPzLLUBegXV48E2koztXnQ=; b=DaGKuJLfz6GY/KTfCUTv6skTAlmn8omtYzBLsTMtAf8TDGce9Qqbwu3jaXVjswYoaO Yjz1y7APiSFRpqyc/jDsbuNXCznORg22ay06pzrIuZL317Oj/wdOeiap5TNE0DFwhzHz gVPXbvBRjDEFfsx+nb29scVRp3IH6vylq0WPY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/+R8+WARc0bg2kwO5tllsXPzLLUBegXV48E2koztXnQ=; b=TqznWbvV0znBg/TW7JBrVP8RXAlc/mtV/5zBoFV64ESdBtT5ocEwiPd4JKn560Fme1 4U25c2Noy1ujLndeUFfrMknEpKvhTYirK4GdBQNbARPab18Tr93gDjWkw/274Y8Rj3jp LuR2wG3FVNRgqIIdQ+7ctixT73rO6l5iKI0PuDZd+OsFF21wzzBfCpRIkZxAiE+XPpih 5UYJecnt86eR++rmHOJ8sZp2pCBFiGh9+aTHksmWW1BddwA4AoeCqr0xAK7rcgGpqPvF upb04A2ZdetkzI55A2Rs/G4BDZNVIbVCSQ1uyB1HaWk+SgVybZCgdiu709kxwucMUQwk 5sTA== X-Gm-Message-State: AMCzsaW/B6JRMcCHtfhWNU3WA9E2HImojZClJjYK4H7P5w/cW1hxTlGq mC/CKTmFjVgYNisg/wyFnrsMow== X-Google-Smtp-Source: AOwi7QBgUPb1fkfe4T23qWhR68/hyf7b11aPAlgSYvC6uH1kiLkNaNkfbzjxwF/AR+e+JQvw4I7sRA== X-Received: by 10.223.160.119 with SMTP id l52mr10639483wrl.38.1507658688622; Tue, 10 Oct 2017 11:04:48 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:4f9:3ae1:43d2:31ae]) by smtp.gmail.com with ESMTPSA id l73sm12513428wmd.47.2017.10.10.11.04.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 10 Oct 2017 11:04:47 -0700 (PDT) From: Daniel Lezcano To: edubezval@gmail.com, rui.zhang@intel.com Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, kevin.wangtao@linaro.org, Leo Yan Subject: [PATCH 01/25] thermal/drivers/hisi: Fix missing interrupt enablement Date: Tue, 10 Oct 2017 20:02:26 +0200 Message-Id: <1507658570-32675-1-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <79a5f10c-0fb7-3e4f-caac-c1625904b137@linaro.org> References: <79a5f10c-0fb7-3e4f-caac-c1625904b137@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The interrupt for the temperature threshold is not enabled at the end of the probe function, enable it after the setup is complete. On the other side, the irq_enabled is not correctly set as we are checking if the interrupt is masked where 'yes' means irq_enabled=false. irq_get_irqchip_state(data->irq, IRQCHIP_STATE_MASKED, &data->irq_enabled); As we are always enabling the interrupt, it is pointless to check if the interrupt is masked or not, just set irq_enabled to 'true'. Signed-off-by: Daniel Lezcano Reviewed-by: Leo Yan Tested-by: Leo Yan --- drivers/thermal/hisi_thermal.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c index 9c3ce34..f3b50b0 100644 --- a/drivers/thermal/hisi_thermal.c +++ b/drivers/thermal/hisi_thermal.c @@ -345,8 +345,7 @@ static int hisi_thermal_probe(struct platform_device *pdev) } hisi_thermal_enable_bind_irq_sensor(data); - irq_get_irqchip_state(data->irq, IRQCHIP_STATE_MASKED, - &data->irq_enabled); + data->irq_enabled = true; for (i = 0; i < HISI_MAX_SENSORS; ++i) { ret = hisi_thermal_register_sensor(pdev, data, @@ -358,6 +357,8 @@ static int hisi_thermal_probe(struct platform_device *pdev) hisi_thermal_toggle_sensor(&data->sensors[i], true); } + enable_irq(data->irq); + return 0; }