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[v2,0/5] Clock and reset improvements for Tegra ALSA drivers

Message ID 20210115140145.10668-1-digetx@gmail.com (mailing list archive)
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Series Clock and reset improvements for Tegra ALSA drivers | expand


Dmitry Osipenko Jan. 15, 2021, 2:01 p.m. UTC
This series improves the handling of clock and reset controls of
NVIDA Tegra ALSA drivers. Tegra HDA and AHUB drivers aren't handling
resets properly, which needs to be fixed in order to unblock other patches
related to fixes of the reset controller driver since HDA/AHUB are bound
to fail once reset controller driver will be corrected. In particular ALSA
drivers are relying on implicit de-assertion of resets which is done by the
tegra-clk driver. It's not the business of the clk driver to touch resets
and we need to fix this because it breaks reset/clk programming sequences
of other Tegra drivers.


v2: - Added regcache_sync() to the "ahub: Reset hardware properly" patch,
      which was missed by accident in v1.

    - Corrected typo in the format of the error message in "ahub: Use
      of_reset_control_array_get_exclusive()" patch by s/%p/%pe/.

Dmitry Osipenko (5):
  ALSA: hda/tegra: Use clk_bulk helpers
  ALSA: hda/tegra: Reset hardware
  ASoC: tegra: ahub: Use of_reset_control_array_get_exclusive()
  ASoC: tegra: ahub: Use clk_bulk helpers
  ASoC: tegra: ahub: Reset hardware properly

 sound/pci/hda/hda_tegra.c      |  86 ++++++++-----------------
 sound/soc/tegra/tegra30_ahub.c | 113 +++++++++------------------------
 sound/soc/tegra/tegra30_ahub.h |   6 +-
 3 files changed, 59 insertions(+), 146 deletions(-)