Show patches with: Submitter = Annaliese McDermond       |    State = Action Required       |   46 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[2/2] ASoC: tlv320aic32x4: Update copyright and use SPDX identifier [1/2] ASoC: tlv320aic32x4: Change author's name - - - --- 2019-04-04 Annaliese McDermond New
[v4,10/10] ASoC: tlv320aic32x4: Allow 192000 Sample Rate ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-22 Annaliese McDermond New
[v4,09/10] ASoC: tlv320aic32x4: Remove mclk references ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-22 Annaliese McDermond New
[v4,08/10] ASoC: tlv320aic32x4: Restructure set_dai_sysclk ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-22 Annaliese McDermond New
[v4,06/10] ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-22 Annaliese McDermond New
[v4,05/10] ASoC: tlv320aic32x4: Control clock gating with CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-22 Annaliese McDermond New
[v4,04/10] ASoC: tlv320aic32x4: Model BDIV divider in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-22 Annaliese McDermond New
[v4,02/10] ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-22 Annaliese McDermond New
[v3,11/11] ASoC: tlv320aic32x4: Allow 192000 Sample Rate ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v3,10/11] ASoC: tlv320aic32x4: Remove mclk references ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v3,09/11] ASoC: tlv320aic32x4: Restructure set_dai_sysclk ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v3,08/11] ASoC: tlv320aic32x4: Dynamically Determine Clocking ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v3,07/11] ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v3,06/11] ASoC: tlv320aic32x4: Control clock gating with CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v3,05/11] ASoC: tlv320aic32x4: Model BDIV divider in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v3,04/11] ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v3,03/11] ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v3,02/11] ASoC: tlv320aic32x4: Model PLL in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-21 Annaliese McDermond New
[v2,12/12] ASoC: tlv320aic32x4: Allow 192000 Sample Rate ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,11/12] ASoC: tlv320aic32x4: Propery Set Processing Blocks ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,10/12] ASoC: tlv320aic32x4: Remove mclk references ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,09/12] ASoC: tlv320aic32x4: Restructure set_dai_sysclk ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,08/12] ASoC: tlv320aic32x4: Dynamically Determine Clocking ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,07/12] ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,06/12] ASoC: tlv320aic32x4: Control clock gating with CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,05/12] ASoC: tlv320aic32x4: Model BDIV divider in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,04/12] ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,03/12] ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,02/12] ASoC: tlv320aic32x4: Model PLL in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[v2,01/12] ASoC: tlv320aic32x4: Break out clock setting into separate function ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-20 Annaliese McDermond New
[13/13] ASoC: tlv320aic32x4: Allow 192000 Sample Rate ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[12/13] ASoC: tlv320aic32x4: Propery Set Processing Blocks ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[11/13] ASoC: tlv320aic32x4: Remove mclk references ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[10/13] ASoC: tlv320aic32x4: Remove sysclk references ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[09/13] ASoC: tlv320aic32x4: Fix clock activation on bias level change ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[08/13] ASoC: tlv320aic32x4: Dynamically Determine Clocking ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[07/13] ASoC: tlv320aic32x4: Move aosr and dosr setting to separate functions ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[06/13] ASoC: tlv320aic32x4: Control clock gating with CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[05/13] ASoC: tlv320aic32x4: Model BDIV divider in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[04/13] ASoC: tlv320aic32x4: Model DAC/ADC dividers in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[03/13] ASoC: tlv320aic32x4: Model CODEC_CLKIN in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[02/13] ASoC: tlv320aic32x4: Model PLL in CCF ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[01/13] ASoC: tlv320aic32x4: Break out clock setting into separate function ASoC: tlv320aic32x4: Rework Clock Setting - - - --- 2019-03-19 Annaliese McDermond New
[v2,2/3] ASoC: tlv320aic32x4: Break out I2C support into separate module - - - --- 2016-04-19 Annaliese McDermond New
ASoC: tlv320aic32x4: Add SPI support - - - --- 2016-04-16 Annaliese McDermond New
ASoC: tlv320aic32x4: Add SPI support - - - --- 2016-04-15 Annaliese McDermond New