Show patches with: Series = [1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL       |   8 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[8/8] ASoC: cs42l42: Update module authors [1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL - - - --- 2021-08-05 Richard Fitzgerald Accepted
[7/8] ASoC: cs42l42: Assume 24-bit samples are in 32-bit slots [1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL - - - --- 2021-08-05 Richard Fitzgerald Accepted
[6/8] ASoC: cs42l42: Validate dai_set_sysclk() frequency [1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL - - - --- 2021-08-05 Richard Fitzgerald Accepted
[5/8] ASoC: cs42l42: Add PLL configuration for 44.1kHz/16-bit [1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL - - - --- 2021-08-05 Richard Fitzgerald Accepted
[4/8] ASoC: cs42l42: Fix mono playback [1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL - - - --- 2021-08-05 Richard Fitzgerald Accepted
[3/8] ASoC: cs42l42: Constrain sample rate to prevent illegal SCLK [1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL - - - --- 2021-08-05 Richard Fitzgerald Accepted
[2/8] ASoC: cs42l42: Fix LRCLK frame start edge [1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL - - - --- 2021-08-05 Richard Fitzgerald Accepted
[1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL [1/8] ASoC: cs42l42: PLL must be running when changing MCLK_SRC_SEL - - - --- 2021-08-05 Richard Fitzgerald Accepted