From patchwork Fri Mar 14 14:42:47 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 3833041 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 3C142BF540 for ; Fri, 14 Mar 2014 14:44:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5270C202F0 for ; Fri, 14 Mar 2014 14:44:58 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id E1184202B8 for ; Fri, 14 Mar 2014 14:44:56 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 03CD2265571; Fri, 14 Mar 2014 15:44:55 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id DF04926550D; Fri, 14 Mar 2014 15:43:08 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id DF5A42654AF; Fri, 14 Mar 2014 15:43:05 +0100 (CET) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by alsa0.perex.cz (Postfix) with ESMTP id 6BE65265383 for ; Fri, 14 Mar 2014 15:43:00 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s2EEgxdL008388; Fri, 14 Mar 2014 09:42:59 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2EEgxuX003040; Fri, 14 Mar 2014 09:42:59 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.174.1; Fri, 14 Mar 2014 09:42:59 -0500 Received: from dlep33.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s2EEgne5008889; Fri, 14 Mar 2014 09:42:57 -0500 From: Peter Ujfalusi To: Mark Brown , Liam Girdwood Date: Fri, 14 Mar 2014 16:42:47 +0200 Message-ID: <1394808168-32608-4-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 1.9.0 In-Reply-To: <1394808168-32608-1-git-send-email-peter.ujfalusi@ti.com> References: <1394808168-32608-1-git-send-email-peter.ujfalusi@ti.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org, lars@metafoo.de, nsekhar@ti.com, Jyri Sarha , zonque@gmail.com Subject: [alsa-devel] [PATCH v2 3/4] ASoC: davinci-mcasp: Constraint on the period and buffer size based on FIFO usage X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP We need to place constraint on the period and buffer size if the read or write AFIFO is enabled and it is configured for more than one word otherwise the DMA will fail in buffer configuration where the sizes are not aligned with the requested FIFO configuration. Some application (like mplayer) needs the constraint placed on the buffer size as well. If only period size is constrained they might fail to figure out the allowed buffer configuration. Signed-off-by: Peter Ujfalusi --- sound/soc/davinci/davinci-mcasp.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index a01ae97c90aa..3ca6e8c4568a 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -720,6 +720,7 @@ static int davinci_mcasp_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); + int afifo_numevt; if (mcasp->version == MCASP_VERSION_4) snd_soc_dai_set_dma_data(dai, substream, @@ -727,6 +728,21 @@ static int davinci_mcasp_startup(struct snd_pcm_substream *substream, else snd_soc_dai_set_dma_data(dai, substream, mcasp->dma_params); + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + afifo_numevt = mcasp->txnumevt; + else + afifo_numevt = mcasp->rxnumevt; + + if (afifo_numevt > 1) { + snd_pcm_hw_constraint_step(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_PERIOD_SIZE, + afifo_numevt); + + snd_pcm_hw_constraint_step(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_BUFFER_SIZE, + afifo_numevt); + } + return 0; }