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+* Rockchip I2S controller
+
+The I2S bus (Inter-IC sound bus) is a serial link for digital audio data transfer
+between devices in the system and be invented by Philips Semiconductor.
+
+Required properties:
+
+- compatible : should be one of the following.
+ "rockchip,rk3066-i2s": for rk3066
+ "rockchip,rk3188-i2s", "rockchip,rk3066-i2s" for rk3188
+ "rockchip,rk3288-i2s", "rockchip,rk3066-i2s" for rk3288
+- reg : physical base address of the controller and length of memory mapped
+ region.
+- interrupts : The interrupt number to the cpu. The interrupt specifier format
+ depends on the interrupt controller.
+- #address-cells : should be 1.
+- #size-cells : should be 0.
+- dmas : list of DMA controller phandle and DMA request line ordered pairs.
+- dma-names : identifier string for each DMA request line in the dmas property.
+ These strings correspond 1:1 with the ordered pairs in dmas.
+ Must include the following entries:
+ - rx:
+ - tx:
+- clocks : Handle to internal work clock and master clock output to IO.
+- clock-names :
+ - "i2s_hclk": support AHB bus interface
+ - "i2s_clk": work clock for i2s controller
+
+Example:
+
+aliases {
+ i2s0 = &i2s0;
+}
+
+i2s0: i2s@ff890000 {
+ compatible = "rockchip,rk3066-i2s";
+ reg = <0xff890000 0x10000>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ dmas = <&pdma1 0>, <&pdma1 1>;
+ dma-names = "rx", "tx";
+ clock-names = "i2s_hclk", "i2s_clk";
+ clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
+};