From patchwork Thu Jul 3 04:25:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konstantinos Tsimpoukas X-Patchwork-Id: 4469191 X-Patchwork-Delegate: tiwai@suse.de Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2D20CBEEAA for ; Thu, 3 Jul 2014 04:26:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3F2B8203A1 for ; Thu, 3 Jul 2014 04:26:02 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id DBB3320381 for ; Thu, 3 Jul 2014 04:26:00 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 039B426560F; Thu, 3 Jul 2014 06:25:58 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, NO_DNS_FOR_FROM, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=no version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id BDDA2265610; Thu, 3 Jul 2014 06:25:48 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id EC0A7265617; Thu, 3 Jul 2014 06:25:47 +0200 (CEST) Received: from mail-oa0-f43.google.com (mail-oa0-f43.google.com [209.85.219.43]) by alsa0.perex.cz (Postfix) with ESMTP id C1251265610 for ; Thu, 3 Jul 2014 06:25:39 +0200 (CEST) Received: by mail-oa0-f43.google.com with SMTP id o6so13486324oag.16 for ; Wed, 02 Jul 2014 21:25:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=iU6vUxSd8MXQBImF1ptxiOClzingLsHPKQJT3KYodxc=; b=zRlVNj2iRnO6392mzBpEo29XfE4eOJdXwSfQ75KtSkCDQkzord2HbcbbtkVQe+6Bgc IV4unRs9VXS6no1QnV4qX9Hvn1P5FJ1h1rKH3xBR5I7vyXEsOXyFPmrZH8UhDmdz1ikd s7/Q/wCs6a3RM1DecZp8wsCuaSwO/tE4m90ITxLeG5zdDe6g6r4P2gGpVWm9FqphBowx 4A5rR4DeuWnz24a3lEkPB+hJXIadcsaVEIYUp9siwlga58ev8tp6DE1XpJettkYjAH18 FWJ3YKxHdz6+8m87IR4mumNmptKnlFISgJC6KKoFiVUpvCvHyXYIAmPTFK4ymjX5nhNc t6xQ== X-Received: by 10.60.101.170 with SMTP id fh10mr1949104oeb.39.1404361538188; Wed, 02 Jul 2014 21:25:38 -0700 (PDT) Received: from kostasPC.gdl.megared.net.mx ([187.245.190.73]) by mx.google.com with ESMTPSA id r4sm53451119obi.3.2014.07.02.21.25.37 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 02 Jul 2014 21:25:37 -0700 (PDT) From: Konstantinos Tsimpoukas To: Konstantinos Tsimpoukas , Date: Wed, 2 Jul 2014 23:25:27 -0500 Message-Id: <1404361527-14068-1-git-send-email-kostaslinuxxx@gmail.com> X-Mailer: git-send-email 1.9.1 Cc: Takashi Iwai , linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org Subject: [alsa-devel] [PATCH 1/1] ice1712: Correcting/completing #defines for REGS X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP This small patch completes #defines for Control/Status Register, adds comments for the missing ones there and on the Interrupt Mask Register and additionally corrects "#define ICE1712_SERR_LEVEL 0x04 -> 0x08", according to documentation. Signed-off-by: Konstantinos Tsimpoukas --- sound/pci/ice1712/ice1712.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/sound/pci/ice1712/ice1712.h b/sound/pci/ice1712/ice1712.h index b209fc3..58f8f2a 100644 --- a/sound/pci/ice1712/ice1712.h +++ b/sound/pci/ice1712/ice1712.h @@ -41,14 +41,17 @@ #define ICEREG(ice, x) ((ice)->port + ICE1712_REG_##x) #define ICE1712_REG_CONTROL 0x00 /* byte */ -#define ICE1712_RESET 0x80 /* reset whole chip */ -#define ICE1712_SERR_LEVEL 0x04 /* SERR# level otherwise edge */ +#define ICE1712_RESET 0x80 /* soft reset whole chip */ +#define ICE1712_SERR_ASSERT_DS_DMA 0x40 /* disabled SERR# assertion for the DS DMA Ch-C irq otherwise enabled */ +#define ICE1712_DOS_VOL 0x10 /* DOS WT/FM volume control */ +#define ICE1712_SERR_LEVEL 0x08 /* SERR# level otherwise edge */ +#define ICE1712_SERR_ASSERT_SB 0x02 /* disabled SERR# assertion for SB irq otherwise enabled */ #define ICE1712_NATIVE 0x01 /* native mode otherwise SB */ #define ICE1712_REG_IRQMASK 0x01 /* byte */ -#define ICE1712_IRQ_MPU1 0x80 -#define ICE1712_IRQ_TIMER 0x40 -#define ICE1712_IRQ_MPU2 0x20 -#define ICE1712_IRQ_PROPCM 0x10 +#define ICE1712_IRQ_MPU1 0x80 /* MIDI irq mask */ +#define ICE1712_IRQ_TIMER 0x40 /* Timer mask */ +#define ICE1712_IRQ_MPU2 0x20 /* Secondary MIDI irq mask */ +#define ICE1712_IRQ_PROPCM 0x10 /* professional multi-track */ #define ICE1712_IRQ_FM 0x08 /* FM/MIDI - legacy */ #define ICE1712_IRQ_PBKDS 0x04 /* playback DS channels */ #define ICE1712_IRQ_CONCAP 0x02 /* consumer capture */