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[1/7] ASoC: Intel: add sst shim register start-end variables

Message ID 1404898076-1882-2-git-send-email-vinod.koul@intel.com (mailing list archive)
State Accepted
Commit 1ad0e33060a64121c1c7acb7ec21a4fdef4aaed6
Headers show

Commit Message

Vinod Koul July 9, 2014, 9:27 a.m. UTC
the shim registers start and end can be useful while parsing the shim addresses,
so add these

Signed-off-by: Vinod Koul <vinod.koul@intel.com>
---
 sound/soc/intel/sst-dsp.h |    4 ++++
 1 files changed, 4 insertions(+), 0 deletions(-)

Comments

Mark Brown July 14, 2014, 6:45 p.m. UTC | #1
On Wed, Jul 09, 2014 at 02:57:49PM +0530, Vinod Koul wrote:
> the shim registers start and end can be useful while parsing the shim addresses,
> so add these

Applied, thanks.
diff mbox

Patch

diff --git a/sound/soc/intel/sst-dsp.h b/sound/soc/intel/sst-dsp.h
index e44423b..967fb32 100644
--- a/sound/soc/intel/sst-dsp.h
+++ b/sound/soc/intel/sst-dsp.h
@@ -53,6 +53,10 @@ 
 #define SST_CSR2		0x80
 #define SST_LTRC		0xE0
 #define SST_HDMC		0xE8
+
+#define SST_SHIM_BEGIN		SST_CSR
+#define SST_SHIM_END		SST_HDMC
+
 #define SST_DBGO		0xF0
 
 #define SST_SHIM_SIZE		0x100