From patchwork Wed Sep 10 13:46:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Lavnikevich X-Patchwork-Id: 4877621 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7E0BB9F32E for ; Wed, 10 Sep 2014 13:57:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E425E200D9 for ; Wed, 10 Sep 2014 13:57:40 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 225D220149 for ; Wed, 10 Sep 2014 13:57:38 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 367E726558B; Wed, 10 Sep 2014 15:57:36 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id AE432265510; Wed, 10 Sep 2014 15:56:54 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id F10382654FF; Wed, 10 Sep 2014 15:48:05 +0200 (CEST) Received: from s250.sam-solutions.net (s250.sam-solutions.net [217.21.49.219]) by alsa0.perex.cz (Postfix) with ESMTP id E911F265500 for ; Wed, 10 Sep 2014 15:47:57 +0200 (CEST) Received: from s326.sam-solutions.net ([217.21.35.11]) by s250.sam-solutions.net with esmtps (TLSv1:AES256-SHA:256) (Exim 4.77) (envelope-from ) id 1XRiFU-0000oq-6S; Wed, 10 Sep 2014 16:47:52 +0300 Received: from localhost (192.168.117.165) by S326.sam-solutions.net (217.21.35.11) with Microsoft SMTP Server (TLS) id 15.0.847.32; Wed, 10 Sep 2014 16:47:46 +0300 From: Dmitry Lavnikevich To: , , , , , , , , , , , , , Date: Wed, 10 Sep 2014 16:46:45 +0300 Message-ID: <1410356809-26179-2-git-send-email-d.lavnikevich@sam-solutions.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1410356809-26179-1-git-send-email-d.lavnikevich@sam-solutions.com> References: <1410356809-26179-1-git-send-email-d.lavnikevich@sam-solutions.com> MIME-Version: 1.0 X-Originating-IP: [192.168.117.165] X-ClientProxiedBy: S326.sam-solutions.net (217.21.35.11) To S326.sam-solutions.net (217.21.35.11) X-Mailman-Approved-At: Wed, 10 Sep 2014 15:56:53 +0200 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Dmitry Lavnikevich , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [alsa-devel] [PATCH 1/5] ARM: dts: pbab01: move i2c pins and frequency configuration into pfla02 X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Since pins and frequency are specific to module (pfla02), not base board (pbab02), it is better to be initialized in corresponding dts file. Signed-off-by: Dmitry Lavnikevich --- arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 22 ---------------------- arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi | 26 ++++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi index 584721264121..f1bdcae5b97d 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi @@ -28,9 +28,6 @@ }; &i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - clock-frequency = <100000>; status = "okay"; tlv320@18 { @@ -55,9 +52,6 @@ }; &i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c3>; - clock-frequency = <100000>; status = "okay"; }; @@ -84,19 +78,3 @@ &usdhc3 { status = "okay"; }; - -&iomuxc { - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 - >; - }; - - pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 - >; - }; -}; diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi index 2694aa84e187..a927e88ccc98 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi @@ -162,6 +162,18 @@ }; }; +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <100000>; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clock-frequency = <100000>; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; @@ -235,6 +247,20 @@ >; }; + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 + >; + }; + pinctrl_uart3: uart3grp { fsl,pins = < MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1