diff mbox

ASoC: Intel: Add 4 channel support to DSP.

Message ID 1413469757-6200-3-git-send-email-liam.r.girdwood@linux.intel.com (mailing list archive)
State Accepted
Commit 48dc326f6ba71ba0ee5b1bbfc128a6577ba98608
Headers show

Commit Message

Liam Girdwood Oct. 16, 2014, 2:29 p.m. UTC
DSP can now support 4 channels in certain use cases.

Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
---
 sound/soc/intel/sst-haswell-ipc.c | 4 ----
 sound/soc/intel/sst-haswell-pcm.c | 8 +-------
 2 files changed, 1 insertion(+), 11 deletions(-)

Comments

Mark Brown Oct. 16, 2014, 2:49 p.m. UTC | #1
On Thu, Oct 16, 2014 at 03:29:16PM +0100, Liam Girdwood wrote:
> DSP can now support 4 channels in certain use cases.

Applied, thanks.
diff mbox

Patch

diff --git a/sound/soc/intel/sst-haswell-ipc.c b/sound/soc/intel/sst-haswell-ipc.c
index 92d625a..4799768 100644
--- a/sound/soc/intel/sst-haswell-ipc.c
+++ b/sound/soc/intel/sst-haswell-ipc.c
@@ -1256,10 +1256,6 @@  int sst_hsw_stream_set_channels(struct sst_hsw *hsw,
 		return -EINVAL;
 	}
 
-	/* stereo is only supported atm */
-	if (channels != 2)
-		return -EINVAL;
-
 	stream->request.format.ch_num = channels;
 	return 0;
 }
diff --git a/sound/soc/intel/sst-haswell-pcm.c b/sound/soc/intel/sst-haswell-pcm.c
index 4df867c..9a51987 100644
--- a/sound/soc/intel/sst-haswell-pcm.c
+++ b/sound/soc/intel/sst-haswell-pcm.c
@@ -421,13 +421,7 @@  static int hsw_pcm_hw_params(struct snd_pcm_substream *substream,
 		return ret;
 	}
 
-	/* we only support stereo atm */
 	channels = params_channels(params);
-	if (channels != 2) {
-		dev_err(rtd->dev, "error: invalid channels %d\n", channels);
-		return -EINVAL;
-	}
-
 	map = create_channel_map(SST_HSW_CHANNEL_CONFIG_STEREO);
 	sst_hsw_stream_set_map_config(hsw, pcm_data->stream,
 			map, SST_HSW_CHANNEL_CONFIG_STEREO);
@@ -741,7 +735,7 @@  static struct snd_soc_dai_driver hsw_dais[] = {
 		.capture = {
 			.stream_name = "Analog Capture",
 			.channels_min = 2,
-			.channels_max = 2,
+			.channels_max = 4,
 			.rates = SNDRV_PCM_RATE_48000,
 			.formats = SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE,
 		},