From patchwork Tue Dec 9 09:41:17 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Imre Deak X-Patchwork-Id: 5461531 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 90AECBEEA8 for ; Tue, 9 Dec 2014 09:42:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7576820155 for ; Tue, 9 Dec 2014 09:42:18 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 4CCFD20131 for ; Tue, 9 Dec 2014 09:42:13 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 5C7A4261AAF; Tue, 9 Dec 2014 10:42:12 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id D92282605B5; Tue, 9 Dec 2014 10:41:35 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 4E15A2605C6; Tue, 9 Dec 2014 10:41:34 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by alsa0.perex.cz (Postfix) with ESMTP id 7CC40260492 for ; Tue, 9 Dec 2014 10:41:25 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 09 Dec 2014 01:41:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,543,1413270000"; d="scan'208";a="650821247" Received: from intelbox.fi.intel.com (HELO localhost) ([10.237.72.105]) by orsmga002.jf.intel.com with ESMTP; 09 Dec 2014 01:41:22 -0800 From: Imre Deak To: intel-gfx@lists.freedesktop.org, alsa-devel@alsa-project.org, Takashi Iwai Date: Tue, 9 Dec 2014 11:41:17 +0200 Message-Id: <1418118078-3676-2-git-send-email-imre.deak@intel.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1418118078-3676-1-git-send-email-imre.deak@intel.com> References: <1418118078-3676-1-git-send-email-imre.deak@intel.com> In-Reply-To: <1418056929-7977-3-git-send-email-imre.deak@intel.com> References: <1418056929-7977-3-git-send-email-imre.deak@intel.com> MIME-Version: 1.0 Cc: Jani Nikula , Daniel Vetter , Chris Wilson Subject: [alsa-devel] [PATCH v2 2/5] drm/i915: add component support X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Register a component to be used to interface with the snd_hda_intel driver. This is meant to replace the same interface that is currently based on module symbol lookup. v2: - change roles between the hda and i915 components (Daniel) - add the implementation to a new file (Jani) - use better namespacing (Jani) Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_component.c | 109 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/i915_dma.c | 4 ++ drivers/gpu/drm/i915/i915_drv.h | 3 + drivers/gpu/drm/i915/intel_drv.h | 4 ++ include/drm/i915_component.h | 38 ++++++++++++ 6 files changed, 160 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/i915/i915_component.c create mode 100644 include/drm/i915_component.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index e4083e4..6b5b082 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -7,7 +7,8 @@ ccflags-y := -Iinclude/drm # Please keep these build lists sorted! # core driver code -i915-y := i915_drv.o \ +i915-y := i915_component.o \ + i915_drv.o \ i915_params.o \ i915_suspend.o \ i915_sysfs.o \ diff --git a/drivers/gpu/drm/i915/i915_component.c b/drivers/gpu/drm/i915/i915_component.c new file mode 100644 index 0000000..4bb49f0 --- /dev/null +++ b/drivers/gpu/drm/i915/i915_component.c @@ -0,0 +1,109 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include +#include +#include "intel_drv.h" + +static void display_component_get_power(struct device *dev) +{ + intel_display_power_get(dev_to_i915(dev), POWER_DOMAIN_AUDIO); +} + +static void display_component_put_power(struct device *dev) +{ + intel_display_power_put(dev_to_i915(dev), POWER_DOMAIN_AUDIO); +} + +/* Get CDCLK in kHz */ +static int display_component_get_cdclk_freq(struct device *dev) +{ + struct drm_i915_private *dev_priv = dev_to_i915(dev); + int ret; + + if (WARN_ON_ONCE(!HAS_DDI(dev_priv))) + return -ENODEV; + + intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO); + ret = intel_ddi_get_cdclk_freq(dev_priv); + intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO); + + return ret; +} + +static const struct i915_display_component_ops display_component_ops = { + .owner = THIS_MODULE, + .get_power = display_component_get_power, + .put_power = display_component_put_power, + .get_cdclk_freq = display_component_get_cdclk_freq, +}; + +static int display_component_bind(struct device *i915_dev, + struct device *hda_dev, void *data) +{ + struct i915_display_component *dcomp = data; + + if (WARN_ON(dcomp->ops || dcomp->dev)) + return -EEXIST; + + dcomp->ops = &display_component_ops; + dcomp->dev = i915_dev; + + return 0; +} + +static void display_component_unbind(struct device *i915_dev, + struct device *hda_dev, void *data) +{ + struct i915_display_component *dcomp = data; + + dcomp->ops = NULL; + dcomp->dev = NULL; +} + +static const struct component_ops display_component_bind_ops = { + .bind = display_component_bind, + .unbind = display_component_unbind, +}; + +void i915_component_init(struct drm_i915_private *dev_priv) +{ + int ret; + + ret = component_add(dev_priv->dev->dev, &display_component_bind_ops); + if (ret < 0) { + DRM_ERROR("failed to add display component (%d)\n", ret); + /* continue with reduced functionality */ + return; + } + + dev_priv->display_component_registered = true; +} + +void i915_component_cleanup(struct drm_i915_private *dev_priv) +{ + if (dev_priv->display_component_registered) { + component_del(dev_priv->dev->dev, &display_component_bind_ops); + dev_priv->display_component_registered = false; + } +} diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 887d88f..b6238bb 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -830,6 +830,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) intel_runtime_pm_enable(dev_priv); + i915_component_init(dev_priv); + return 0; out_power_well: @@ -870,6 +872,8 @@ int i915_driver_unload(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; int ret; + i915_component_cleanup(dev_priv); + ret = i915_gem_suspend(dev); if (ret) { DRM_ERROR("failed to idle hardware: %d\n", ret); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index fb2616d..3b7ae14 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1684,6 +1684,9 @@ struct drm_i915_private { bool mchbar_need_disable; + /* hda/i915 display component */ + bool display_component_registered; + struct intel_l3_parity l3_parity; /* Cannot be determined by PCIID. You must always read a register. */ diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 61a88fa..856709e 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -809,6 +809,10 @@ static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv) int intel_get_crtc_scanline(struct intel_crtc *crtc); void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv); +/* i915_component.c */ +void i915_component_init(struct drm_i915_private *dev_priv); +void i915_component_cleanup(struct drm_i915_private *dev_priv); + /* intel_crt.c */ void intel_crt_init(struct drm_device *dev); diff --git a/include/drm/i915_component.h b/include/drm/i915_component.h new file mode 100644 index 0000000..9c660ca --- /dev/null +++ b/include/drm/i915_component.h @@ -0,0 +1,38 @@ +/* + * Copyright © 2014 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#ifndef _I915_COMPONENT_H_ +#define _I915_COMPONENT_H_ + +struct i915_display_component { + struct device *dev; + + const struct i915_display_component_ops { + struct module *owner; + void (*get_power)(struct device *); + void (*put_power)(struct device *); + int (*get_cdclk_freq)(struct device *); + } *ops; +}; + +#endif /* _I915_COMPONENT_H_ */