From patchwork Thu Jan 8 02:31:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oder Chiou X-Patchwork-Id: 5590331 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EA1A99F357 for ; Thu, 8 Jan 2015 02:32:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 112CC20383 for ; Thu, 8 Jan 2015 02:32:08 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id C5FEA2037F for ; Thu, 8 Jan 2015 02:32:06 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id D570F265344; Thu, 8 Jan 2015 03:32:05 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 068872652E1; Thu, 8 Jan 2015 03:31:35 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 5511F26525B; Thu, 8 Jan 2015 03:31:32 +0100 (CET) Received: from rtits2.realtek.com (rtits2.realtek.com [60.250.210.242]) by alsa0.perex.cz (Postfix) with ESMTP id CA8542606CB for ; Thu, 8 Jan 2015 03:31:24 +0100 (CET) Authenticated-By: X-SpamFilter-By: BOX Solutions SpamTrap 5.52 with qID t082VBpj011972, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (rtitcas12.realtek.com.tw[172.21.6.16]) by rtits2.realtek.com (8.14.9/2.40/5.64) with ESMTP id t082VBpj011972 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NOT); Thu, 8 Jan 2015 10:31:11 +0800 Received: from sw-server.rtdomain (172.21.81.164) by RTITCAS12.realtek.com.tw (172.21.6.16) with Microsoft SMTP Server id 14.3.181.6; Thu, 8 Jan 2015 10:31:12 +0800 From: Oder Chiou To: , Date: Thu, 8 Jan 2015 10:31:06 +0800 Message-ID: <1420684267-19211-2-git-send-email-oder_chiou@realtek.com> X-Mailer: git-send-email 1.8.1.1.439.g50a6b54 In-Reply-To: <1420684267-19211-1-git-send-email-oder_chiou@realtek.com> References: <1420684267-19211-1-git-send-email-oder_chiou@realtek.com> MIME-Version: 1.0 X-Originating-IP: [172.21.81.164] Cc: Oder Chiou , alsa-devel@alsa-project.org, yang.a.fang@intel.com, john.lin@realtek.com, bardliao@realtek.com, flove@realtek.com Subject: [alsa-devel] [PATCH 2/3] ASoC: rt5677: Add the MICBIAS VDD setting in the platform data X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP The patch adds the MICBIAS VDD setting in the platform data. It can be set to 1V8 or 3V3 in the MICBIAS VDD. Signed-off-by: Oder Chiou --- include/sound/rt5677.h | 3 +++ sound/soc/codecs/rt5677.c | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/include/sound/rt5677.h b/include/sound/rt5677.h index d9eb7d8..a620704 100644 --- a/include/sound/rt5677.h +++ b/include/sound/rt5677.h @@ -37,6 +37,9 @@ struct rt5677_platform_data { OFF, GPIO4, GPIO5 and GPIO6 respectively */ unsigned int jd2_gpio; unsigned int jd3_gpio; + + /* Set MICBIAS1 VDD 1v8 or 3v3 */ + bool micbias1_vdd_3v3; }; #endif diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index d27630a..32c368c 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -4923,6 +4923,11 @@ static int rt5677_i2c_probe(struct i2c_client *i2c, RT5677_GPIO5_DIR_OUT); } + if (rt5677->pdata.micbias1_vdd_3v3) + regmap_update_bits(rt5677->regmap, RT5677_MICBIAS, + RT5677_MICBIAS1_CTRL_VDD_MASK, + RT5677_MICBIAS1_CTRL_VDD_3_3V); + rt5677_init_gpio(i2c); rt5677_init_irq(i2c);