From patchwork Tue Jan 13 03:13:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oder Chiou X-Patchwork-Id: 5617521 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9AEB09F358 for ; Tue, 13 Jan 2015 03:13:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A553220225 for ; Tue, 13 Jan 2015 03:13:46 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id C33C7205E8 for ; Tue, 13 Jan 2015 03:13:43 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 4DEF726150C; Tue, 13 Jan 2015 04:13:42 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id A53312614A1; Tue, 13 Jan 2015 04:13:33 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 298442614A4; Tue, 13 Jan 2015 04:13:33 +0100 (CET) Received: from rtits2.realtek.com (rtits2.realtek.com [60.250.210.242]) by alsa0.perex.cz (Postfix) with ESMTP id D3EC92614A1 for ; Tue, 13 Jan 2015 04:13:25 +0100 (CET) Authenticated-By: X-SpamFilter-By: BOX Solutions SpamTrap 5.52 with qID t0D3DMBk007522, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (rtitcas12.realtek.com.tw[172.21.6.16]) by rtits2.realtek.com (8.14.9/2.40/5.64) with ESMTP id t0D3DMBk007522 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NOT); Tue, 13 Jan 2015 11:13:22 +0800 Received: from sw-server.rtdomain (172.21.81.164) by RTITCAS12.realtek.com.tw (172.21.6.16) with Microsoft SMTP Server id 14.3.181.6; Tue, 13 Jan 2015 11:13:22 +0800 From: Oder Chiou To: , Date: Tue, 13 Jan 2015 11:13:15 +0800 Message-ID: <1421118795-23092-2-git-send-email-oder_chiou@realtek.com> X-Mailer: git-send-email 1.8.1.1.439.g50a6b54 In-Reply-To: <1421118795-23092-1-git-send-email-oder_chiou@realtek.com> References: <1421118795-23092-1-git-send-email-oder_chiou@realtek.com> MIME-Version: 1.0 X-Originating-IP: [172.21.81.164] Cc: Oder Chiou , alsa-devel@alsa-project.org, yang.a.fang@intel.com, john.lin@realtek.com, bardliao@realtek.com, flove@realtek.com Subject: [alsa-devel] [PATCH 2/2 v2] ASoC: rt5677: Add the slot_width "25" support in the TDM mode X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Add the slot_width "25" support in the TDM mode for the Intel platform. Signed-off-by: Oder Chiou --- sound/soc/codecs/rt5677.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index 24fc592..a683e69 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -4103,7 +4103,7 @@ static int rt5677_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, { struct snd_soc_codec *codec = dai->codec; struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); - unsigned int val = 0; + unsigned int val = 0, slot_width_25 = 0; if (rx_mask || tx_mask) val |= (1 << 12); @@ -4127,6 +4127,8 @@ static int rt5677_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, case 20: val |= (1 << 8); break; + case 25: + slot_width_25 = 0x8080; case 24: val |= (2 << 8); break; @@ -4142,10 +4144,14 @@ static int rt5677_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, case RT5677_AIF1: regmap_update_bits(rt5677->regmap, RT5677_TDM1_CTRL1, 0x1f00, val); + regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x8000, + slot_width_25); break; case RT5677_AIF2: regmap_update_bits(rt5677->regmap, RT5677_TDM2_CTRL1, 0x1f00, val); + regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x80, + slot_width_25); break; default: break;