From patchwork Sun Feb 15 09:37:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 5829821 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B778F9F30C for ; Sun, 15 Feb 2015 09:38:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1B6EE201C8 for ; Sun, 15 Feb 2015 09:38:19 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 11D4420145 for ; Sun, 15 Feb 2015 09:38:14 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 81265260566; Sun, 15 Feb 2015 10:38:12 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, NO_DNS_FOR_FROM, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=no version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 8BBFD260554; Sun, 15 Feb 2015 10:38:03 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id CB0F8260557; Sun, 15 Feb 2015 10:38:02 +0100 (CET) Received: from mail-pa0-f41.google.com (mail-pa0-f41.google.com [209.85.220.41]) by alsa0.perex.cz (Postfix) with ESMTP id 63E3F260533 for ; Sun, 15 Feb 2015 10:37:56 +0100 (CET) Received: by mail-pa0-f41.google.com with SMTP id kx10so28554573pab.0 for ; Sun, 15 Feb 2015 01:37:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=OkAX+PM5iEncHL+kF63cfgug3fdEJROfZpUZ4RzFS8I=; b=rE1eThk1PW3ReTwAgziiN4eBo1RDpMbRzQJheSOjklkiWuxPCBRCfgZGPsMU7uDoDK WotdtRXyoccJg29ryOD68YKO+eLGX3sl69/zFiRLftf16Gkn+4oBQmlv5X9MA7VvEXtE GEbPxzhbdj72sAwJTGwA9M6GbM69a3llrNdrIZOzXUsPg6xdCaxneP7BGd/o9+bwAnPR 7CYVwoMN1bOqcvZk9d9uAhI4nyZPLUYpm8Z/ARqLMOE2uKNiXJ6Ck5tj191SH3oXrJYs 8CDAIy/JYL0wWXHvbR/ouig1JusesC4IeNZXjmr2m0Ug1OjMAFn3veMvmJlOaZ3DOBTi ExRg== X-Received: by 10.67.21.144 with SMTP id hk16mr30586941pad.140.1423993074905; Sun, 15 Feb 2015 01:37:54 -0800 (PST) Received: from Alpha.attlocal.net (99-189-113-45.lightspeed.sntcca.sbcglobal.net. [99.189.113.45]) by mx.google.com with ESMTPSA id ck11sm11549322pac.5.2015.02.15.01.37.53 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 15 Feb 2015 01:37:54 -0800 (PST) From: Nicolin Chen To: broonie@kernel.org Date: Sun, 15 Feb 2015 01:37:11 -0800 Message-Id: <1423993031-29474-1-git-send-email-nicoleotsuka@gmail.com> X-Mailer: git-send-email 1.9.1 Cc: scerveau@voxtok.com, alsa-devel@alsa-project.org, zidan.wang@freescale.com, lgirdwood@gmail.com, tiwai@suse.de, linux-kernel@vger.kernel.org, timur@tabi.org, mpa@pengutronix.de, shengjiu.wang@freescale.com Subject: [alsa-devel] [PATCH] ASoC: fsl_ssi: Don't try to round-up for PM divisor calculation X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP According to i.MX6 Series Reference Manual, the formula to calculate the sys clock is sysclk rate = bclk rate * (div2 + 1) * (7 * psr + 1) * (pm + 1) * 2 Commit aafa85e71a75 ("ASoC: fsl_ssi: Add DAI master mode support for SSI on i.MX series") added the divisor calculation which relies on the clk_round_rate(). However, at that time, clk_round_rate() didn't provide closest clock rates for some cases because it might not use a correct rounding policy. So using the original formula (pm + 1) for PM divisor was not able to give us a desired clock rate. And then we used (pm + 2) to do the trick. However, the clk-divider driver has been refined a lot since commit b11d282dbea2 ("clk: divider: fix rate calculation for fractional rates") Now using (pm + 2) trick would result an incorrect clock rate. So this patch fixes the problem by removing the useless trick. Reported-by: Stephane Cerveau Signed-off-by: Nicolin Chen --- [ I also checked that only 3.18 stable tree has the refinements for clk-divider driver, so I guess it might not be able to apply to previous long-term trees if being treated as bug fix. -- Nicolin ] sound/soc/fsl/fsl_ssi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index d7365c5..3e7c644 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -603,7 +603,7 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream, factor = (div2 + 1) * (7 * psr + 1) * 2; for (i = 0; i < 255; i++) { - tmprate = freq * factor * (i + 2); + tmprate = freq * factor * (i + 1); if (baudclk_is_used) clkrate = clk_get_rate(ssi_private->baudclk);