| Message ID | 1430191660-2959-1-git-send-email-bardliao@realtek.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 60a8d62b8497c23eb3d48149af7e55dac2dd83a2 |
| Headers | show |
On Tue, Apr 28, 2015 at 11:27:39AM +0800, Bard Liao wrote: > DMIC clock source is not from codec system clock directly. it is > generated from the division of system clock. And it should be 256 * > sample rate of AIF1. Applied, thanks.
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index fbe16ba..dca64ae 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -917,7 +917,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, { struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); - int idx = rl6231_calc_dmic_clk(rt5677->sysclk); + int idx = rl6231_calc_dmic_clk(rt5677->lrck[RT5677_AIF1] << 8); if (idx < 0) dev_err(codec->dev, "Failed to set DMIC clock\n");
DMIC clock source is not from codec system clock directly. it is generated from the division of system clock. And it should be 256 * sample rate of AIF1. Signed-off-by: Bard Liao <bardliao@realtek.com> --- sound/soc/codecs/rt5677.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)