From patchwork Sun May 17 16:27:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 6425041 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6D5E59F1C1 for ; Sun, 17 May 2015 16:36:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A2D2420602 for ; Sun, 17 May 2015 16:36:42 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 79041205FA for ; Sun, 17 May 2015 16:36:41 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 9B43F26070A; Sun, 17 May 2015 18:36:40 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=no version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id B4B4C2604BA; Sun, 17 May 2015 18:31:24 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 0C15F2604BA; Sun, 17 May 2015 18:31:24 +0200 (CEST) Received: from mail-pd0-f172.google.com (mail-pd0-f172.google.com [209.85.192.172]) by alsa0.perex.cz (Postfix) with ESMTP id 7C15D2604D3 for ; Sun, 17 May 2015 18:29:36 +0200 (CEST) Received: by pdbqa5 with SMTP id qa5so111602732pdb.0 for ; Sun, 17 May 2015 09:29:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LiXiWi3j/aCWoMF9U5U3gXifpJKzzdRXRHNpNeaW4eA=; b=BV6cxIkWPvvVB0WgVsFl7mS3j+o2ddJiL6V2f5b9gWuaA/lwFez5U1JNDq34m3ZhOg 9QxGuA9u+CPxDJECLRX7oybqSIXafRoCJ1XTYxnV4FAYEqJ9qzIfG0UzvXhgW5p4S3oO nj+HUTAW3LA+0OX58QNeMaXNLae8MJoiBPxxujd/DPxh3kwm2a+soQfkYpDwzD8il0qb l/Ql50V0FH61sHolE/1XHvAikgCBG/rrkShbDGy+rTia1Z9mY8T9ufEaIRzlSGgYnYec wOwIaGaNFLYu805f9Dv/W1OpLOxLB8P5N08xPNZzTlueU9UTC7EgA1GgX99cOE5TV1uY BSUQ== X-Received: by 10.70.119.36 with SMTP id kr4mr37521664pdb.39.1431880175874; Sun, 17 May 2015 09:29:35 -0700 (PDT) Received: from fangorn.rup.mentorg.com (nat-min.mentorg.com. [139.181.32.34]) by mx.google.com with ESMTPSA id pw9sm7574264pac.27.2015.05.17.09.29.29 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 17 May 2015 09:29:35 -0700 (PDT) From: Dmitry Eremin-Solenikov To: Russell King , Daniel Mack , Robert Jarzmik , Linus Walleij , Alexandre Courbot , Wolfram Sang , Dmitry Torokhov , Bryan Wu , Richard Purdie , Samuel Ortiz , Lee Jones , Mark Brown , Jingoo Han , Jean-Christophe Plagniol-Villard , Tomi Valkeinen , Liam Girdwood , Andrea Adami Date: Sun, 17 May 2015 19:27:52 +0300 Message-Id: <1431880077-26321-13-git-send-email-dbaryshkov@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1431880077-26321-1-git-send-email-dbaryshkov@gmail.com> References: <1431880077-26321-1-git-send-email-dbaryshkov@gmail.com> Cc: linux-fbdev@vger.kernel.org, alsa-devel@alsa-project.org, linux-spi@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org, linux-leds@vger.kernel.org Subject: [alsa-devel] [PATCH v3 12/17] ARM: sa1100: don't preallocate IRQ space for locomo X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP As new locomo driver properly supports SPARSE_IRQ, stop playing with NR_IRQS on sa1100 (locomo was the last chip requiring NR_IRQ tricks). Signed-off-by: Dmitry Eremin-Solenikov --- arch/arm/mach-sa1100/include/mach/irqs.h | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-sa1100/include/mach/irqs.h b/arch/arm/mach-sa1100/include/mach/irqs.h index 734e30e..b4b9608 100644 --- a/arch/arm/mach-sa1100/include/mach/irqs.h +++ b/arch/arm/mach-sa1100/include/mach/irqs.h @@ -79,22 +79,7 @@ #define IRQ_BOARD_START 61 #define IRQ_BOARD_END 77 -/* - * Figure out the MAX IRQ number. - * - * Neponset, SA1111 and UCB1x00 are sparse IRQ aware, so can dynamically - * allocate their IRQs above NR_IRQS. - * - * LoCoMo has 4 additional IRQs, but is not sparse IRQ aware, and so has - * to be included in the NR_IRQS calculation. - */ -#ifdef CONFIG_SHARP_LOCOMO -#define NR_IRQS_LOCOMO 4 -#else -#define NR_IRQS_LOCOMO 0 -#endif - #ifndef NR_IRQS -#define NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO) +#define NR_IRQS IRQ_BOARD_START #endif -#define SA1100_NR_IRQS (IRQ_BOARD_START + NR_IRQS_LOCOMO) +#define SA1100_NR_IRQS IRQ_BOARD_START