From patchwork Thu Jun 4 13:04:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 6546941 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4EE0CC0020 for ; Thu, 4 Jun 2015 13:07:17 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5E541207FD for ; Thu, 4 Jun 2015 13:07:16 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 254B7207E4 for ; Thu, 4 Jun 2015 13:07:15 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 33D8E266645; Thu, 4 Jun 2015 15:07:14 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [IPv6:::1]) by alsa0.perex.cz (Postfix) with ESMTP id 3FEF9266528; Thu, 4 Jun 2015 15:04:57 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id B04FA266511; Thu, 4 Jun 2015 15:04:55 +0200 (CEST) Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by alsa0.perex.cz (Postfix) with ESMTP id 8738E26061B for ; Thu, 4 Jun 2015 15:04:49 +0200 (CEST) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t54D4ltI017894; Thu, 4 Jun 2015 08:04:47 -0500 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id t54D4lHN006959; Thu, 4 Jun 2015 08:04:47 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.3.224.2; Thu, 4 Jun 2015 08:04:47 -0500 Received: from dlep33.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id t54D4aQ3020795; Thu, 4 Jun 2015 08:04:45 -0500 From: Peter Ujfalusi To: Mark Brown , Liam Girdwood , Date: Thu, 4 Jun 2015 16:04:16 +0300 Message-ID: <1433423075-14142-5-git-send-email-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.4.2 In-Reply-To: <1433423075-14142-1-git-send-email-peter.ujfalusi@ti.com> References: <1433423075-14142-1-git-send-email-peter.ujfalusi@ti.com> MIME-Version: 1.0 Cc: alsa-devel@alsa-project.org Subject: [alsa-devel] [PATCH v2 04/23] ASoC: tas2552: Correct PDM configuration register bit definitions X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP The PDM clock can be selected via bit0-1. PDM_DATA_ES bit is at bit2. The code were trying to select BCLK as PDM reference clock but instead it was selecting PLL and set the DATA_ES bit to 1. Selecting the PLL output as reference clock as default does make sense, but the driver should not change the PDM data edge. Signed-off-by: Peter Ujfalusi --- sound/soc/codecs/tas2552.c | 2 +- sound/soc/codecs/tas2552.h | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/sound/soc/codecs/tas2552.c b/sound/soc/codecs/tas2552.c index 9954bd4c14f3..07a0ec03905d 100644 --- a/sound/soc/codecs/tas2552.c +++ b/sound/soc/codecs/tas2552.c @@ -376,7 +376,7 @@ static int tas2552_codec_probe(struct snd_soc_codec *codec) TAS2552_DIN_SRC_SEL_AVG_L_R | TAS2552_88_96KHZ); snd_soc_write(codec, TAS2552_DOUT, TAS2552_PDM_DATA_I); snd_soc_write(codec, TAS2552_OUTPUT_DATA, TAS2552_PDM_DATA_V_I | 0x8); - snd_soc_write(codec, TAS2552_PDM_CFG, TAS2552_PDM_BCLK_SEL); + snd_soc_write(codec, TAS2552_PDM_CFG, TAS2552_PDM_CLK_SEL_PLL); snd_soc_write(codec, TAS2552_BOOST_PT_CTRL, TAS2552_APT_DELAY_200 | TAS2552_APT_THRESH_2_1_7); diff --git a/sound/soc/codecs/tas2552.h b/sound/soc/codecs/tas2552.h index 6cea8f31bf88..938d90f1cab9 100644 --- a/sound/soc/codecs/tas2552.h +++ b/sound/soc/codecs/tas2552.h @@ -99,12 +99,12 @@ #define TAS2552_PDM_DATA_V_I (0x11 << 6) /* PDM CFG Register */ -#define TAS2552_PDM_DATA_ES_RISE 0x4 - -#define TAS2552_PDM_PLL_CLK_SEL 0x00 -#define TAS2552_PDM_IV_CLK_SEL (1 << 1) -#define TAS2552_PDM_BCLK_SEL (1 << 2) -#define TAS2552_PDM_MCLK_SEL (1 << 3) +#define TAS2552_PDM_CLK_SEL_PLL (0x0 << 0) +#define TAS2552_PDM_CLK_SEL_IVCLKIN (0x1 << 0) +#define TAS2552_PDM_CLK_SEL_BCLK (0x2 << 0) +#define TAS2552_PDM_CLK_SEL_MCLK (0x3 << 0) +#define TAS2552_PDM_CLK_SEL_MASK TAS2552_PDM_CLK_SEL_MCLK +#define TAS2552_PDM_DATA_ES (1 << 2) /* Boost pass-through register */ #define TAS2552_APT_DELAY_50 0x00