From patchwork Mon Nov 2 03:14:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Caesar Wang X-Patchwork-Id: 7533131 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8FB1FBEEA4 for ; Mon, 2 Nov 2015 03:15:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id ACCBA202DD for ; Mon, 2 Nov 2015 03:15:55 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 8106E20279 for ; Mon, 2 Nov 2015 03:15:54 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 92BD526069D; Mon, 2 Nov 2015 04:15:48 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 68CF72606BA; Mon, 2 Nov 2015 04:15:05 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 16F842606BF; Mon, 2 Nov 2015 04:15:04 +0100 (CET) Received: from mail-pa0-f65.google.com (mail-pa0-f65.google.com [209.85.220.65]) by alsa0.perex.cz (Postfix) with ESMTP id E216226062F for ; Mon, 2 Nov 2015 04:14:35 +0100 (CET) Received: by pabfh17 with SMTP id fh17so972728pab.3 for ; Sun, 01 Nov 2015 19:14:35 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=wMiWgmyikr6gXBPhVqjPQbrjSiK+HyNGp+YrJ/becdc=; b=KeU4W0ZQ4ZpxOWjO2zr3VH/IX0Y6MXA/rGMGmXYe5Pyae488PSXT20KepQOgx/IjVP 19IDxyiZQnD0AjzMpwKqCa35Ka+KSqqw7/qT1kFqeIPFJOiBEgeFxB6jOIG7Xh9v4An3 9DfK3ITY0qE4VpHW65/lMlgHD3wx8f0Y78QyjgrhvFJozBMgfOcKU55aXg/HVxN/i7BF twN3h7/mfacApDTiWLKUYUMzC3uer/eJ1DLy+HxKa+73TfUhYIIh5ZxYWnQakYplrGyM 271UbM8SqOiaznn85JqGJDs/0y7750Q7arr3zyaXAvczEx06ue2RcMpO6tlgFmi+Fay1 Jsqg== X-Received: by 10.68.57.176 with SMTP id j16mr24136555pbq.166.1446434075015; Sun, 01 Nov 2015 19:14:35 -0800 (PST) Received: from localhost.localdomain ([103.47.144.160]) by smtp.gmail.com with ESMTPSA id ir4sm20727873pbb.93.2015.11.01.19.14.28 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 01 Nov 2015 19:14:34 -0800 (PST) From: Caesar Wang To: Heiko Stuebner , Mark Brown Date: Mon, 2 Nov 2015 11:14:02 +0800 Message-Id: <1446434042-2139-3-git-send-email-wxt@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1446434042-2139-1-git-send-email-wxt@rock-chips.com> References: <1446434042-2139-1-git-send-email-wxt@rock-chips.com> Cc: alsa-devel@alsa-project.org, Liam Girdwood , linux-kernel@vger.kernel.org, Takashi Iwai , linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Caesar Wang Subject: [alsa-devel] [PATCH 3/3] ASoC: rockchip-rt5645: add the divider the clock for cpu X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Add to set the cpu/codec DAI configure, let's divider the Transmit/Receive clock for cpu. In master mode, The SCLK and LRCK are configured as output, this patch should can set each divider to arrange the clock distribution. Signed-off-by: Caesar Wang --- sound/soc/rockchip/rockchip_rt5645.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/sound/soc/rockchip/rockchip_rt5645.c b/sound/soc/rockchip/rockchip_rt5645.c index 68c62e4..35fe000 100644 --- a/sound/soc/rockchip/rockchip_rt5645.c +++ b/sound/soc/rockchip/rockchip_rt5645.c @@ -74,8 +74,25 @@ static int rk_aif1_hw_params(struct snd_pcm_substream *substream, struct snd_soc_pcm_runtime *rtd = substream->private_data; struct snd_soc_dai *cpu_dai = rtd->cpu_dai; struct snd_soc_dai *codec_dai = rtd->codec_dai; + int dai_fmt = rtd->card->dai_link->dai_fmt; int mclk; + /* set codec DAI configuration */ + ret = snd_soc_dai_set_fmt(codec_dai, dai_fmt); + if (ret < 0) { + dev_err(codec_dai->dev, + "failed to set the format for codec side\n"); + return ret; + } + + /* set cpu DAI configuration */ + ret = snd_soc_dai_set_fmt(cpu_dai, dai_fmt); + if (ret < 0) { + dev_err(codec_dai->dev, + "failed to set the format for cpu side\n"); + return ret; + } + switch (params_rate(params)) { case 8000: case 16000: @@ -104,6 +121,21 @@ static int rk_aif1_hw_params(struct snd_pcm_substream *substream, return ret; } + /* The codec is master mode, that's not needed set clkdiv for cpu */ + if ((dai_fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM) + return ret; + + /* the LRCK clock for cpu */ + ret = snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_BCLK, + (mclk / 4) / params_rate(params)); + if (ret < 0) + return ret; + + /* the SCLK clock for cpu */ + snd_soc_dai_set_clkdiv(cpu_dai, ROCKCHIP_DIV_MCLK, 4); + if (ret < 0) + return ret; + return ret; }