From patchwork Fri Dec 11 06:44:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 7826601 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7F7AF9F1C2 for ; Fri, 11 Dec 2015 06:45:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A5FF220527 for ; Fri, 11 Dec 2015 06:45:17 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 762DF204D3 for ; Fri, 11 Dec 2015 06:45:16 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 9B08D2665A3; Fri, 11 Dec 2015 07:45:15 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_LOW, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 36A31266610; Fri, 11 Dec 2015 07:42:51 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 13EDD265779; Fri, 11 Dec 2015 07:42:50 +0100 (CET) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by alsa0.perex.cz (Postfix) with ESMTP id 05DAF26589D for ; Fri, 11 Dec 2015 07:41:36 +0100 (CET) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP; 10 Dec 2015 22:41:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,412,1444719600"; d="scan'208";a="871434305" Received: from vkoul-udesk7.iind.intel.com ([10.223.84.135]) by fmsmga002.fm.intel.com with ESMTP; 10 Dec 2015 22:41:34 -0800 From: Vinod Koul To: alsa-devel@alsa-project.org Date: Fri, 11 Dec 2015 12:14:18 +0530 Message-Id: <1449816267-11910-6-git-send-email-vinod.koul@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1449816267-11910-1-git-send-email-vinod.koul@intel.com> References: <1449816267-11910-1-git-send-email-vinod.koul@intel.com> Cc: tiwai@suse.de, Jayachandran B , patches.audio@intel.com, liam.r.girdwood@linux.intel.com, Vinod Koul , broonie@kernel.org Subject: [alsa-devel] [PATCH 05/14] ALSA: hdac: Add MISCBDCGE support X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jayachandran B MISCBDCGE is a new register for Misc Backbone clock gate control which is useful to control while resetting the link and ensuring controller is in required state so add API to control it Signed-off-by: Jayachandran B Signed-off-by: Vinod Koul --- include/sound/hda_register.h | 3 +++ include/sound/hdaudio_ext.h | 1 + sound/hda/ext/hdac_ext_controller.c | 23 +++++++++++++++++++++++ 3 files changed, 27 insertions(+) diff --git a/include/sound/hda_register.h b/include/sound/hda_register.h index 28ac1f9a18ac..fa33237f4bd1 100644 --- a/include/sound/hda_register.h +++ b/include/sound/hda_register.h @@ -96,6 +96,9 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; /* PCI space */ #define AZX_PCIREG_TCSEL 0x44 +#define AZX_PCIREG_CGCTL 0x48 +#define AZX_CGCTL_MISCBDCGE_MASK (1 << 6) + /* * other constants */ diff --git a/include/sound/hdaudio_ext.h b/include/sound/hdaudio_ext.h index f3454950ee0b..65961bbb8ca3 100644 --- a/include/sound/hdaudio_ext.h +++ b/include/sound/hdaudio_ext.h @@ -152,6 +152,7 @@ void snd_hdac_ext_link_set_stream_id(struct hdac_ext_link *link, int stream); void snd_hdac_ext_link_clear_stream_id(struct hdac_ext_link *link, int stream); +void snd_hdac_ext_bus_enable_miscbdcge(struct device *dev, bool enable); /* update register macro */ #define snd_hdac_updatel(addr, reg, mask, val) \ diff --git a/sound/hda/ext/hdac_ext_controller.c b/sound/hda/ext/hdac_ext_controller.c index 556267e75591..8f1d292a522c 100644 --- a/sound/hda/ext/hdac_ext_controller.c +++ b/sound/hda/ext/hdac_ext_controller.c @@ -21,6 +21,7 @@ #include #include #include +#include /* * maximum HDAC capablities we should parse to avoid endless looping: @@ -306,3 +307,25 @@ int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus) return 0; } EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all); + +static void update_pci_dword(struct pci_dev *pci, + unsigned int reg, u32 mask, u32 val) +{ + u32 data; + + pci_read_config_dword(pci, reg, &data); + data &= ~mask; + data |= (val & mask); + pci_write_config_dword(pci, reg, data); +} + +void snd_hdac_ext_bus_enable_miscbdcge(struct device *dev, bool enable) +{ + struct pci_dev *pci = to_pci_dev(dev); + u32 val; + + val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0; + + update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val); +} +EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_enable_miscbdcge);