| Message ID | 1450216285-14875-1-git-send-email-benzh@chromium.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 1aa844cd56c7a2b94824f02495ff7ae5d52a7e91 |
| Headers | show |
On Tue, Dec 15, 2015 at 01:51:25PM -0800, Ben Zhang wrote: > Sometimes PLL1 stops working if the codec loses power > during suspend (when pow-ldo2 or reset gpio is used). > MX-7Bh(RT5677_PLL1_CTRL2) is cleared and won't be restored > by regcache since it's volatile. MX-7Bh has one status bit > and M code for PLL1. rt5677_set_dai_pll doesn't reconfigure > PLL1 after resume because it thinks the PLL params are not > changed. > This patch clears the cached PLL params at resume so that > rt5677_set_dai_pll can reconfigure the PLL after resume. This is something I'd expect the machine driver to handle - if it's stopped using the PLL I'd expect it to explicitly turn it off, suspend (or the CODEC going idle for that matter normally, the PLL is burning power) should do that. If anything I'd expect the CODEC driver to restore the current settings. That said I'll apply this since it at least doesn't make things worse.
> -----Original Message----- > From: Mark Brown [mailto:broonie@kernel.org] > Sent: Thursday, December 17, 2015 3:21 AM > To: Ben Zhang > Cc: alsa-devel@alsa-project.org; Liam Girdwood; Bard Liao; Oder Chiou; > John Lin; Dylan Reid; Anatol Pomozov > Subject: Re: [PATCH] ASoC: rt5677: Reconfigure PLL1 after resume > > On Tue, Dec 15, 2015 at 01:51:25PM -0800, Ben Zhang wrote: > > Sometimes PLL1 stops working if the codec loses power during suspend > > (when pow-ldo2 or reset gpio is used). > > MX-7Bh(RT5677_PLL1_CTRL2) is cleared and won't be restored by > regcache > > since it's volatile. MX-7Bh has one status bit and M code for PLL1. > > rt5677_set_dai_pll doesn't reconfigure > > PLL1 after resume because it thinks the PLL params are not changed. > > > This patch clears the cached PLL params at resume so that > > rt5677_set_dai_pll can reconfigure the PLL after resume. > > This is something I'd expect the machine driver to handle - if it's stopped > using the PLL I'd expect it to explicitly turn it off, suspend (or the CODEC > going idle for that matter normally, the PLL is burning > power) should do that. If anything I'd expect the CODEC driver to restore > the current settings. The main reason of this patch is MX-7Bh(RT5677_PLL1_CTRL2) is volatile. However, the status bit of MX-7Bh is currently not used by codec driver. So, it should be no problem if we set it non-volatile. > > That said I'll apply this since it at least doesn't make things worse. Can we revert it and resend a patch? > > ------Please consider the environment before printing this e-mail.
On Thu, Dec 17, 2015 at 05:21:05AM +0000, Bard Liao wrote: > > This is something I'd expect the machine driver to handle - if it's stopped > > using the PLL I'd expect it to explicitly turn it off, suspend (or the CODEC > > going idle for that matter normally, the PLL is burning > > power) should do that. If anything I'd expect the CODEC driver to restore > > the current settings. > The main reason of this patch is MX-7Bh(RT5677_PLL1_CTRL2) is volatile. > However, the status bit of MX-7Bh is currently not used by codec driver. > So, it should be no problem if we set it non-volatile. > > That said I'll apply this since it at least doesn't make things worse. > Can we revert it and resend a patch? Sure.
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c index f73fd12..c404f51 100644 --- a/sound/soc/codecs/rt5677.c +++ b/sound/soc/codecs/rt5677.c @@ -4792,6 +4792,9 @@ static int rt5677_resume(struct snd_soc_codec *codec) struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec); if (!rt5677->dsp_vad_en) { + rt5677->pll_src = 0; + rt5677->pll_in = 0; + rt5677->pll_out = 0; gpiod_set_value_cansleep(rt5677->pow_ldo2, 1); gpiod_set_value_cansleep(rt5677->reset_pin, 0); if (rt5677->pow_ldo2 || rt5677->reset_pin)
Sometimes PLL1 stops working if the codec loses power during suspend (when pow-ldo2 or reset gpio is used). MX-7Bh(RT5677_PLL1_CTRL2) is cleared and won't be restored by regcache since it's volatile. MX-7Bh has one status bit and M code for PLL1. rt5677_set_dai_pll doesn't reconfigure PLL1 after resume because it thinks the PLL params are not changed. This patch clears the cached PLL params at resume so that rt5677_set_dai_pll can reconfigure the PLL after resume. Signed-off-by: Ben Zhang <benzh@chromium.org> --- sound/soc/codecs/rt5677.c | 3 +++ 1 file changed, 3 insertions(+)