From patchwork Wed Apr 6 08:38:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sugar Zhang X-Patchwork-Id: 8759211 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1B5639F36E for ; Wed, 6 Apr 2016 08:39:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 27B28201B4 for ; Wed, 6 Apr 2016 08:39:34 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id CC71A20114 for ; Wed, 6 Apr 2016 08:39:32 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id E5B65265881; Wed, 6 Apr 2016 10:39:31 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 6CE2A265130; Wed, 6 Apr 2016 10:39:23 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id F3EEA265232; Wed, 6 Apr 2016 10:39:22 +0200 (CEST) Received: from regular1.263xmail.com (regular1.263xmail.com [211.150.99.130]) by alsa0.perex.cz (Postfix) with ESMTP id 08171265130 for ; Wed, 6 Apr 2016 10:39:14 +0200 (CEST) Received: from sugar.zhang?rock-chips.com (unknown [192.168.167.110]) by regular1.263xmail.com (Postfix) with SMTP id 7EC3DB622; Wed, 6 Apr 2016 16:39:10 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-KSVirus-check: 0 Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.263.net (Postfix) with ESMTP id 463EE2FE5E; Wed, 6 Apr 2016 16:39:04 +0800 (CST) X-RL-SENDER: sugar.zhang@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: sugar.zhang@rock-chips.com X-UNIQUE-TAG: <4e49630fa062b112872ea6ecc8580ee3> X-ATTACHMENT-NUM: 0 X-SENDER: zxg@rock-chips.com X-DNS-TYPE: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (Postfix) whith ESMTP id 19593J6UAA6; Wed, 06 Apr 2016 16:39:06 +0800 (CST) From: Sugar Zhang To: heiko@sntech.de, broonie@kernel.org Date: Wed, 6 Apr 2016 16:38:22 +0800 Message-Id: <1459931902-77324-1-git-send-email-sugar.zhang@rock-chips.com> X-Mailer: git-send-email 1.9.1 Cc: Mark Rutland , devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, Takashi Iwai , Liam Girdwood , Sugar Zhang , linux-rockchip@lists.infradead.org, Sjoerd Simons , Rob Herring , Kumar Gala , Jianqun Xu , linux-arm-kernel@lists.infradead.org Subject: [alsa-devel] [PATCH] ASoC: rockchip: i2s: configure the sdio pins' iomux mode X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP There are 3 i2s sdio pins, which iomux mode is as follows: - sdi3_sdo1 - sdi2_sdo2 - sdi1_sdo3 we need to configure these pins' iomux mode via the GRF register when use multi channel playback/capture. Signed-off-by: Sugar Zhang --- .../devicetree/bindings/sound/rockchip-i2s.txt | 5 +++ sound/soc/rockchip/rockchip_i2s.c | 39 +++++++++++++++++++++- sound/soc/rockchip/rockchip_i2s.h | 8 +++++ 3 files changed, 51 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt index 6e86d8a..ad72a7d 100644 --- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt +++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt @@ -23,6 +23,11 @@ Required properties: - rockchip,playback-channels: max playback channels, if not set, 8 channels default. - rockchip,capture-channels: max capture channels, if not set, 2 channels default. +Required properties for controller which support multi channels playback/capture: + +- rockchip,grf: Should be phandle/offset pair. the phandle of the syscon node for GRF register, + and the offset of the GRF for control register. + Example for rk3288 I2S controller: i2s@ff890000 { diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c index 2f8e204..bc72780 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -11,6 +11,7 @@ */ #include +#include #include #include #include @@ -33,6 +34,8 @@ struct rk_i2s_dev { struct snd_dmaengine_dai_dma_data playback_dma_data; struct regmap *regmap; + struct regmap *grf; + u32 iocfg_reg; bool is_master_mode; }; @@ -277,6 +280,29 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream, I2S_TXCR_VDW_MASK | I2S_TXCR_CSR_MASK, val); + if (!IS_ERR(i2s->grf)) { + regmap_read(i2s->regmap, I2S_TXCR, &val); + val &= I2S_TXCR_CSR_MASK; + + switch (val) { + case I2S_CHN_4: + val = I2S_IO_4CH_OUT_6CH_IN; + break; + case I2S_CHN_6: + val = I2S_IO_6CH_OUT_4CH_IN; + break; + case I2S_CHN_8: + val = I2S_IO_8CH_OUT_2CH_IN; + break; + default: + val = I2S_IO_2CH_OUT_8CH_IN; + break; + } + + regmap_write(i2s->grf, i2s->iocfg_reg, + I2S_IO_DIRECTION_MASK << 16 | val); + } + regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK, I2S_DMACR_TDL(16)); regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK, @@ -478,6 +504,18 @@ static int rockchip_i2s_probe(struct platform_device *pdev) return -ENOMEM; } + i2s->dev = &pdev->dev; + + i2s->grf = syscon_regmap_lookup_by_phandle(node, "rockchip,grf"); + if (!IS_ERR(i2s->grf)) { + ret = of_property_read_u32_index(node, "rockchip,grf", + 1, &i2s->iocfg_reg); + if (ret) { + dev_err(&pdev->dev, "Can't get iocfg_reg offset\n"); + return ret; + } + } + /* try to prepare related clocks */ i2s->hclk = devm_clk_get(&pdev->dev, "i2s_hclk"); if (IS_ERR(i2s->hclk)) { @@ -517,7 +555,6 @@ static int rockchip_i2s_probe(struct platform_device *pdev) i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; i2s->capture_dma_data.maxburst = 4; - i2s->dev = &pdev->dev; dev_set_drvdata(&pdev->dev, i2s); pm_runtime_enable(&pdev->dev); diff --git a/sound/soc/rockchip/rockchip_i2s.h b/sound/soc/rockchip/rockchip_i2s.h index dc6e2c7..9a6aabf 100644 --- a/sound/soc/rockchip/rockchip_i2s.h +++ b/sound/soc/rockchip/rockchip_i2s.h @@ -236,4 +236,12 @@ enum { #define I2S_TXDR (0x0024) #define I2S_RXDR (0x0028) +/* io direction cfg register */ +#define I2S_IO_DIRECTION_SHIFT 11 +#define I2S_IO_DIRECTION_MASK (7 << I2S_IO_DIRECTION_SHIFT) +#define I2S_IO_8CH_OUT_2CH_IN (0 << I2S_IO_DIRECTION_SHIFT) +#define I2S_IO_6CH_OUT_4CH_IN (1 << I2S_IO_DIRECTION_SHIFT) +#define I2S_IO_4CH_OUT_6CH_IN (3 << I2S_IO_DIRECTION_SHIFT) +#define I2S_IO_2CH_OUT_8CH_IN (7 << I2S_IO_DIRECTION_SHIFT) + #endif /* _ROCKCHIP_IIS_H */