From patchwork Wed May 4 14:54:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Keeping X-Patchwork-Id: 9015681 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5AC2C9F1C1 for ; Wed, 4 May 2016 15:01:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 48460203AA for ; Wed, 4 May 2016 15:01:29 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id 93E21203A0 for ; Wed, 4 May 2016 15:01:27 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id D65E6265D2B; Wed, 4 May 2016 17:01:25 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, NO_DNS_FOR_FROM,RCVD_IN_DNSWL_NONE,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=no version=3.3.1 Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 327B4265A7B; Wed, 4 May 2016 16:58:50 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 05449265AE7; Wed, 4 May 2016 16:58:48 +0200 (CEST) Received: from metanate.com (dougal.metanate.com [90.155.101.14]) by alsa0.perex.cz (Postfix) with ESMTP id DA8A5265A7B for ; Wed, 4 May 2016 16:55:11 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=simple/simple; d=metanate.com; s=stronger; h=References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=r5sO6rmsN/PHNG0wG64HtwzLh/qEdKWdVGqvBWMQhYA=; b=O6G9D1kksc7M7XwcmQVZpIDmmC5Pb9pbLCve3FP9QX1ALoUYw2/yl5kCqvPFAsc24mjU0lBxDQcMNHkwy5mR5tM/PRUoFlFL1nCEkk1Pq8BGUlX6OnrQDxRmYX0t1BjX9/7rzrgDf7VEGbBmjTC0ffrw5hene5UAIfhos4LllYr5UwRpSvuX9RuMzR9g+kJiW5wl9bcD5hXjC8LA+D7OltgswpC230v93NPGtV5xFL0rnhPJX3RaZ4067CMuwZ4cMBrPhYGhAAd845H8ruGp42r7u3dOLsDTgwU8cJMlom83f6+/m131dowWGkHebXDaprURMiTEvXNz715o1+etfQ==; Received: from brian ([192.168.88.1] helo=leela.metanate.com) by shrek.metanate.com with esmtpsa (TLSv1.2:AES128-SHA256:128) (Exim 4.83_RC2) (envelope-from ) id 1axyCf-0007bj-2I; Wed, 04 May 2016 15:55:05 +0100 From: John Keeping To: alsa-devel@alsa-project.org Date: Wed, 4 May 2016 15:54:46 +0100 Message-Id: <1462373686-21794-2-git-send-email-john@metanate.com> X-Mailer: git-send-email 2.8.0.rc4.238.g874082a In-Reply-To: <1462373686-21794-1-git-send-email-john@metanate.com> References: <1462373686-21794-1-git-send-email-john@metanate.com> Cc: Heiko Stuebner , Enric Balletbo Serra , linux-kernel@vger.kernel.org, Takashi Iwai , Liam Girdwood , linux-rockchip@lists.infradead.org, Mark Brown , John Keeping , linux-arm-kernel@lists.infradead.org Subject: [alsa-devel] [PATCH 2/2] Revert "ASoC: rockchip: i2s: separate capture and playback" X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP This reverts commit eba65d179c1149cf79e68608d452631f33d7f017. This broke audio on Veyron Jerry Chromebooks and I now cannot reproduce the problem I was trying to fix even with this commit reverted, so it seems that this was completely the wrong thing to do. Reported-by: Enric Balletbo Serra Signed-off-by: John Keeping --- sound/soc/rockchip/rockchip_i2s.c | 72 ++++++++++++++++++++++----------------- 1 file changed, 40 insertions(+), 32 deletions(-) diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c index 34743ec61c49..574c6af28c06 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c @@ -82,8 +82,8 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE); regmap_update_bits(i2s->regmap, I2S_XFER, - I2S_XFER_TXS_START, - I2S_XFER_TXS_START); + I2S_XFER_TXS_START | I2S_XFER_RXS_START, + I2S_XFER_TXS_START | I2S_XFER_RXS_START); i2s->tx_start = true; } else { @@ -92,23 +92,27 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE); - regmap_update_bits(i2s->regmap, I2S_XFER, - I2S_XFER_TXS_START, - I2S_XFER_TXS_STOP); - - regmap_update_bits(i2s->regmap, I2S_CLR, - I2S_CLR_TXC, - I2S_CLR_TXC); + if (!i2s->rx_start) { + regmap_update_bits(i2s->regmap, I2S_XFER, + I2S_XFER_TXS_START | + I2S_XFER_RXS_START, + I2S_XFER_TXS_STOP | + I2S_XFER_RXS_STOP); - regmap_read(i2s->regmap, I2S_CLR, &val); + regmap_update_bits(i2s->regmap, I2S_CLR, + I2S_CLR_TXC | I2S_CLR_RXC, + I2S_CLR_TXC | I2S_CLR_RXC); - /* Should wait for clear operation to finish */ - while (val & I2S_CLR_TXC) { regmap_read(i2s->regmap, I2S_CLR, &val); - retry--; - if (!retry) { - dev_warn(i2s->dev, "fail to clear\n"); - break; + + /* Should wait for clear operation to finish */ + while (val) { + regmap_read(i2s->regmap, I2S_CLR, &val); + retry--; + if (!retry) { + dev_warn(i2s->dev, "fail to clear\n"); + break; + } } } } @@ -124,8 +128,8 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE); regmap_update_bits(i2s->regmap, I2S_XFER, - I2S_XFER_RXS_START, - I2S_XFER_RXS_START); + I2S_XFER_TXS_START | I2S_XFER_RXS_START, + I2S_XFER_TXS_START | I2S_XFER_RXS_START); i2s->rx_start = true; } else { @@ -134,23 +138,27 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE); - regmap_update_bits(i2s->regmap, I2S_XFER, - I2S_XFER_RXS_START, - I2S_XFER_RXS_STOP); - - regmap_update_bits(i2s->regmap, I2S_CLR, - I2S_CLR_RXC, - I2S_CLR_RXC); + if (!i2s->tx_start) { + regmap_update_bits(i2s->regmap, I2S_XFER, + I2S_XFER_TXS_START | + I2S_XFER_RXS_START, + I2S_XFER_TXS_STOP | + I2S_XFER_RXS_STOP); - regmap_read(i2s->regmap, I2S_CLR, &val); + regmap_update_bits(i2s->regmap, I2S_CLR, + I2S_CLR_TXC | I2S_CLR_RXC, + I2S_CLR_TXC | I2S_CLR_RXC); - /* Should wait for clear operation to finish */ - while (val & I2S_CLR_RXC) { regmap_read(i2s->regmap, I2S_CLR, &val); - retry--; - if (!retry) { - dev_warn(i2s->dev, "fail to clear\n"); - break; + + /* Should wait for clear operation to finish */ + while (val) { + regmap_read(i2s->regmap, I2S_CLR, &val); + retry--; + if (!retry) { + dev_warn(i2s->dev, "fail to clear\n"); + break; + } } } }