From patchwork Mon Oct 24 09:55:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Charles Keepax X-Patchwork-Id: 9391873 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E0A3E607D0 for ; Mon, 24 Oct 2016 10:54:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D29B628F55 for ; Mon, 24 Oct 2016 10:54:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C6B5328F59; Mon, 24 Oct 2016 10:54:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 466F928F55 for ; Mon, 24 Oct 2016 10:54:33 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id 3E706266BCF; Mon, 24 Oct 2016 12:54:32 +0200 (CEST) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 063242667E7; Mon, 24 Oct 2016 12:52:08 +0200 (CEST) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id CBB382667EA; Mon, 24 Oct 2016 11:55:51 +0200 (CEST) Received: from mx0b-001ae601.pphosted.com (mx0a-001ae601.pphosted.com [67.231.149.25]) by alsa0.perex.cz (Postfix) with ESMTP id 604312667EA for ; Mon, 24 Oct 2016 11:55:45 +0200 (CEST) Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id u9O9sA8I007571; Mon, 24 Oct 2016 04:55:44 -0500 Authentication-Results: ppops.net; spf=none smtp.mailfrom=ckeepax@opensource.wolfsonmicro.com Received: from mail2.cirrus.com (mail1.cirrus.com [141.131.3.20]) by mx0a-001ae601.pphosted.com with ESMTP id 2685gyjdph-1; Mon, 24 Oct 2016 04:55:44 -0500 Received: from EX17.ad.cirrus.com (unknown [172.20.9.81]) by mail2.cirrus.com (Postfix) with ESMTP id A4CCE611CE61; Mon, 24 Oct 2016 04:55:43 -0500 (CDT) Received: from imbe.wolfsonmicro.main (198.61.95.81) by EX17.ad.cirrus.com (172.20.9.81) with Microsoft SMTP Server id 14.3.301.0; Mon, 24 Oct 2016 10:55:43 +0100 Received: from algalon.wolfsonmicro.main ([172.22.20.24]) by imbe.wolfsonmicro.main (8.14.4/8.14.4) with ESMTP id u9O9tGwE021537; Mon, 24 Oct 2016 10:55:17 +0100 From: Charles Keepax To: Date: Mon, 24 Oct 2016 10:55:48 +0100 Message-ID: <1477302949-28049-5-git-send-email-ckeepax@opensource.wolfsonmicro.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1477302949-28049-1-git-send-email-ckeepax@opensource.wolfsonmicro.com> References: <1477302949-28049-1-git-send-email-ckeepax@opensource.wolfsonmicro.com> MIME-Version: 1.0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1609300000 definitions=main-1610240180 Cc: brian.austin@cirrus.com, alsa-devel@alsa-project.org, lgirdwood@gmail.com, Paul.Handrigan@cirrus.com, patches@opensource.wolfsonmicro.com Subject: [alsa-devel] [PATCH 5/6] ASoC: cs42l52: Mark chip ID register as volatile X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Mark the chip ID register as volatile, the current code does work as without a default value regmap will read from the hardware the first time, however, this makes it more explicit that this register should be read from the hardware. Signed-off-by: Charles Keepax --- sound/soc/codecs/cs42l52.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/codecs/cs42l52.c b/sound/soc/codecs/cs42l52.c index 0d9c4a5..1164990 100644 --- a/sound/soc/codecs/cs42l52.c +++ b/sound/soc/codecs/cs42l52.c @@ -120,6 +120,7 @@ static bool cs42l52_readable_register(struct device *dev, unsigned int reg) static bool cs42l52_volatile_register(struct device *dev, unsigned int reg) { switch (reg) { + case CS42L52_CHIP: case CS42L52_IFACE_CTL2: case CS42L52_CLK_STATUS: case CS42L52_BATT_LEVEL: