From patchwork Fri Mar 17 15:41:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Olivier MOYSAN X-Patchwork-Id: 9630991 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E4F0A60245 for ; Fri, 17 Mar 2017 15:42:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BFAB9286BD for ; Fri, 17 Mar 2017 15:42:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B2C6D286BF; Fri, 17 Mar 2017 15:42:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F2884286BD for ; Fri, 17 Mar 2017 15:42:36 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 54EC9267239; Fri, 17 Mar 2017 16:42:06 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id AE17126723C; Fri, 17 Mar 2017 16:42:04 +0100 (CET) Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [62.209.51.94]) by alsa0.perex.cz (Postfix) with ESMTP id 93A1C267211 for ; Fri, 17 Mar 2017 16:42:00 +0100 (CET) Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id v2HFWWRK012147; Fri, 17 Mar 2017 16:42:00 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-.pphosted.com with ESMTP id 297wwsqd8h-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 17 Mar 2017 16:41:59 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 52A413D; Fri, 17 Mar 2017 15:41:59 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2F8E528C1; Fri, 17 Mar 2017 15:41:59 +0000 (GMT) Received: from localhost (10.48.0.208) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 17 Mar 2017 16:41:58 +0100 From: olivier moysan To: , , , , , , , Date: Fri, 17 Mar 2017 16:41:51 +0100 Message-ID: <1489765311-29857-3-git-send-email-olivier.moysan@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1489765311-29857-1-git-send-email-olivier.moysan@st.com> References: <1489765311-29857-1-git-send-email-olivier.moysan@st.com> MIME-Version: 1.0 X-Originating-IP: [10.48.0.208] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-03-17_12:, , signatures=0 Cc: arnaud.pouliquen@st.com Subject: [alsa-devel] [RFC PATCH v2 2/2] ASoC: wm8994: delay aifxclk activation X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP This patch is a draft. The aim of this patch is to allow the following use case: - The codec wm8994 is configured as a slave of CPU DAI - The codec is configured before runtime - CPU DAI provides master clock to the codec at runtime only The wm8994 cannot be configured as long as master clock is not provided to the codec. aif clock, charge pump and DC servo registers are written to the codec but are not read back at their expected values, when the master clock is not set during configuration. In this use case, master clock is not available before pcm stream start. So previous settings are failing if there are set in SND_SOC_DAPM_PRE_PMU stage. A way to go around this problem, is to delay aifxclk activation until SND_SOC_DAPM_POST_PMU DAPM stage. However delaying aif clock may have side effect on other use cases. The purpose of this patch is to illustrate the principle of the fix and to check if it may be applicable in all other contexts. Signed-off-by: olivier moysan --- sound/soc/codecs/wm8994.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index ccf640a..6782d9e 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c @@ -1262,7 +1262,7 @@ static int late_enable_ev(struct snd_soc_dapm_widget *w, struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec); switch (event) { - case SND_SOC_DAPM_PRE_PMU: + case SND_SOC_DAPM_POST_PMU: if (wm8994->aif1clk_enable) { aif1clk_ev(w, kcontrol, SND_SOC_DAPM_PRE_PMU); snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1, @@ -1615,6 +1615,8 @@ static SOC_ENUM_SINGLE_DECL(aif2dacr_src_enum, SND_SOC_DAPM_MUX_E("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &wm_hubs_hpr_mux, late_enable_ev, SND_SOC_DAPM_PRE_PMU), +SND_SOC_DAPM_POST("Late Enable PGA", late_enable_ev), + SND_SOC_DAPM_POST("Late Disable PGA", late_disable_ev) };