From patchwork Fri Jan 11 17:22:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sameer Pujar X-Patchwork-Id: 10760369 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8BBE01515 for ; Fri, 11 Jan 2019 17:23:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6AA3A2A23E for ; Fri, 11 Jan 2019 17:23:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 689292A25F; Fri, 11 Jan 2019 17:23:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0FC4C2A25A for ; Fri, 11 Jan 2019 17:23:04 +0000 (UTC) Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 9AE2E267980; Fri, 11 Jan 2019 18:22:51 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id C00B3267997; Fri, 11 Jan 2019 18:22:48 +0100 (CET) Received: from hqemgate14.nvidia.com (hqemgate14.nvidia.com [216.228.121.143]) by alsa0.perex.cz (Postfix) with ESMTP id 817F7267985 for ; Fri, 11 Jan 2019 18:22:46 +0100 (CET) Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 11 Jan 2019 09:22:31 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Fri, 11 Jan 2019 09:22:44 -0800 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Fri, 11 Jan 2019 09:22:44 -0800 Received: from HQMAIL104.nvidia.com (172.18.146.11) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 11 Jan 2019 17:22:44 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Fri, 11 Jan 2019 17:22:44 +0000 Received: from linux.nvidia.com (Not Verified[10.24.34.185]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 11 Jan 2019 09:22:44 -0800 From: Sameer Pujar To: , , Date: Fri, 11 Jan 2019 22:52:07 +0530 Message-ID: <1547227328-32558-5-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1547227328-32558-1-git-send-email-spujar@nvidia.com> References: <1547227328-32558-1-git-send-email-spujar@nvidia.com> MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1547227351; bh=nu5bjIVRDorhXYHABww+mYLNiXcOynsgvw6/GlyE7Iw=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:MIME-Version:Content-Type; b=DPMegrq+C0a+l0/RpYrgr3UFHi63lXLAdBl3wyrtog0gD7K6vBN+MliR4lkCtuM6k MSgyogC1yPvUyCYr8dfAKlWwmatpApF9acrDwG5trhGH8vuCoJgwpmz8NWuaJbVJhN YnPScPJZNaZg2xMywLY91JHLwocU6kxyXpLt3BVXLFZ+teIdiQyz99diWu+W+nd4Zo H3UG4SDUeImrTB9931BUtIuk9YwNzlWo3nEAPD4IiHHUF8/YeMDu26oYAgeF9Oy1Pf w/+voY9AGQvwV4ccGTnxgNHnJkorcF9ejEKyFHRYzJxOoamJsAkxsKjIKzs+wdRhie ROToqAwfuZJhg== Cc: alsa-devel@alsa-project.org, Sameer Pujar Subject: [alsa-devel] [PATCH v2 4/5] ALSA: hda: program stripe bits for controller X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP Platforms having multiple hdmi/dp sinks require higher bandwidth to support simultaneous playbacks of higher resolution. If hda controller supports multiple SDO lines, STRIPE can be used to indicate how many of the SDO lines the stream should be striped across. During stream start stripe control bits are programmed to use given number of sdo lines and the same is cleared during stream stop. Signed-off-by: Sameer Pujar Reviewed-by: Mohan Kumar D Reviewed-by: Ravindra Lokhande --- sound/hda/hdac_stream.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/sound/hda/hdac_stream.c b/sound/hda/hdac_stream.c index b403b05..7b71da0 100644 --- a/sound/hda/hdac_stream.c +++ b/sound/hda/hdac_stream.c @@ -82,6 +82,7 @@ EXPORT_SYMBOL_GPL(snd_hdac_stream_init); void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start) { struct hdac_bus *bus = azx_dev->bus; + int stripe_ctl; trace_snd_hdac_stream_start(bus, azx_dev); @@ -91,6 +92,10 @@ void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start) /* enable SIE */ snd_hdac_chip_updatel(bus, INTCTL, 0, 1 << azx_dev->index); + /* set stripe control */ + stripe_ctl = snd_hdac_get_stream_stripe_ctl(bus, azx_dev->substream); + snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK, + stripe_ctl); /* set DMA start and interrupt mask */ snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_DMA_START | SD_INT_MASK); @@ -107,6 +112,7 @@ void snd_hdac_stream_clear(struct hdac_stream *azx_dev) snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_DMA_START | SD_INT_MASK, 0); snd_hdac_stream_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */ + snd_hdac_stream_updateb(azx_dev, SD_CTL_3B, SD_CTL_STRIPE_MASK, 0); azx_dev->running = false; } EXPORT_SYMBOL_GPL(snd_hdac_stream_clear);