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Thu, 01 Oct 2020 10:33:17 -0700 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 1 Oct 2020 17:34:58 +0000 Received: from audio.nvidia.com (10.124.1.5) by mail.nvidia.com (172.20.187.18) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Thu, 1 Oct 2020 17:34:53 +0000 From: Sameer Pujar To: , , , , , , , , Subject: [PATCH v3 09/13] ASoC: dt-bindings: tegra: Add schema for audio graph card Date: Thu, 1 Oct 2020 23:03:03 +0530 Message-ID: <1601573587-15288-10-git-send-email-spujar@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1601573587-15288-1-git-send-email-spujar@nvidia.com> References: <1601573587-15288-1-git-send-email-spujar@nvidia.com> MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1601573598; bh=1m9aUvgKZy/iYRzXFgjMHyA/Qza8PoLq3wlioFAv9eA=; h=From:To:CC:Subject:Date:Message-ID:X-Mailer:In-Reply-To: References:MIME-Version:Content-Type; b=AzEA73aRHr1Q5sWyGpruRHzIMIRr4romEKt/fkyz/dYS3i5X6LQ+IV79Ep4ePtarF ORVwnrydL5DcqC6Kr7+WhBnG411R2XlDppdbO1H5LRb19IWLLMaWKVdvKYmuagQMg/ MimzlGVqKBgBUEfxCk1EgHWKXa4oLOtekyOK0kXsbJRuEryMepQcMsnKOovQfNTed/ Yfh/jlSiathVhB1JSaFNjDunbQYSgLyEAC43Jq8rMLW6PBdYILDcdVePYsFUjUxIIg +VTXndoQyFsCW+GMrBS/k9R7MwSTyudvLKAUdEcHCYiMMnOZHZofnQ576M2WcQPwWD uYTW5H0q5sdrw== Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, nicoleotsuka@gmail.com, swarren@nvidia.com, Sameer Pujar , linux-kernel@vger.kernel.org, atalambedu@nvidia.com, viswanathl@nvidia.com, sharadg@nvidia.com, nwartikar@nvidia.com, linux-tegra@vger.kernel.org, rlokhande@nvidia.com, mkumard@nvidia.com, dramesh@nvidia.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Add YAML schema for Tegra audio graph sound card DT bindings. It uses the same DT bindings provided by generic audio graph driver. Along with this few standard clock DT bindings are added which are specifically required for Tegra audio. Signed-off-by: Sameer Pujar --- .../sound/nvidia,tegra-audio-graph-card.yaml | 70 ++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml new file mode 100644 index 0000000..b73fbe5 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Audio Graph based Tegra sound card driver + +description: | + This is based on generic audio graph card driver along with additional + customizations for Tegra platforms. It uses the same bindings with + additional standard clock DT bindings required for Tegra. + + See{LINUX}/Documentation/devicetree/bindings/sound/audio-graph-card.txt + +maintainers: + - Jon Hunter + - Sameer Pujar + +properties: + compatible: + oneOf: + - const: nvidia,tegra210-audio-graph-card + - const: nvidia,tegra186-audio-graph-card + + clocks: + minItems: 2 + + clock-names: + minItems: 2 + items: + - const: pll_a + - const: plla_out0 + + assigned-clocks: + minItems: 1 + maxItems: 3 + + assigned-clock-parents: + minItems: 1 + maxItems: 3 + + assigned-clock-rates: + minItems: 1 + maxItems: 3 + +required: + - compatible + - clocks + - clock-names + - assigned-clocks + - assigned-clock-parents + +examples: + - | + #include + + tegra_sound { + compatible = "nvidia,tegra210-audio-graph-card"; + clocks = <&tegra_car TEGRA210_CLK_PLL_A>, + <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; + clock-names = "pll_a", "plla_out0"; + assigned-clocks = <&tegra_car TEGRA210_CLK_PLL_A>, + <&tegra_car TEGRA210_CLK_PLL_A_OUT0>, + <&tegra_car TEGRA210_CLK_EXTERN1>; + assigned-clock-parents = <0>, <0>, <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; + assigned-clock-rates = <368640000>, <49152000>, <12288000>; + }; + +...