From patchwork Fri Jun 10 14:45:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivasa Rao Mandadapu X-Patchwork-Id: 12877671 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6093C433EF for ; Fri, 10 Jun 2022 14:47:58 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id EB4DB1AAA; Fri, 10 Jun 2022 16:47:06 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz EB4DB1AAA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1654872477; bh=8dMixmuB1nF/M8UJ2MwsEQR5UtXi6Pmmk+HrMs6g5Ow=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=tNhX+mnbc9fT68jGio+bzFyuQa4gD6ka1YL8prmLrNdYCtl7Vrjchek/dR1lFBSCE EuPlBVaKaW54ffjWbRQ6ifM7tJidADd6JmBF2ujZ20fr70uckSSm+m2U0QKnprjV9/ A39QD9up9UwQ+qd9JDnzo7FbTE/HhHiBQae9zIow= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id BBE4DF80520; Fri, 10 Jun 2022 16:46:26 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 9F6AAF80527; Fri, 10 Jun 2022 16:46:25 +0200 (CEST) Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) (using TLSv1.2 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id D7EE2F804D2 for ; Fri, 10 Jun 2022 16:46:14 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz D7EE2F804D2 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="JKA1fb+v" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1654872376; x=1686408376; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=NUOD0yMrUh2Jr58XdNmiDo2EC4GZIqQc43MOqVvowlw=; b=JKA1fb+vjz0yArrfFZefndcIyB7GzrXYlMc6Yn9i55kEkvVv2t80F3aZ uyzNCyiOuEUUgObKV3hS/j9nN92X8/pm7Mid6UI3BZT3zxI3sR5GZob5A cLLB58k8eb/7aEoeU1FEaUOX+rSjA8t3AluqkVG8XaNGcjWzwK/hmN1Q/ o=; Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 10 Jun 2022 07:46:11 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Jun 2022 07:46:10 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 07:46:10 -0700 Received: from hu-srivasam-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 10 Jun 2022 07:46:04 -0700 From: Srinivasa Rao Mandadapu To: , , , , , , , , , , , , , , , , , Linus Walleij , Subject: [PATCH v3 2/2] pinctrl: qcom: sc7280: Add clock optional check for ADSP bypass targets Date: Fri, 10 Jun 2022 20:15:35 +0530 Message-ID: <1654872335-4993-3-git-send-email-quic_srivasam@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1654872335-4993-1-git-send-email-quic_srivasam@quicinc.com> References: <1654872335-4993-1-git-send-email-quic_srivasam@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Cc: Srinivasa Rao Mandadapu X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Update lpass lpi pin control driver, with clock optional check for ADSP disabled platforms. This check required for distingushing ADSP based platforms and ADSP bypass platforms. In case of ADSP enabled platforms, where audio is routed through ADSP macro and decodec GDSC Switches are triggered as clocks by pinctrl driver and ADSP firmware controls them. So It's mandatory to enable them in ADSP based solutions. In case of ADSP bypass platforms clock voting is optional as these macro and dcodec GDSC switches are maintained as power domains and operated from lpass clock drivers. Signed-off-by: Srinivasa Rao Mandadapu Reviewed-by: Stephen Boyd --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 3 +++ drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c index 74810ec..6e03529 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c @@ -388,6 +388,9 @@ int lpi_pinctrl_probe(struct platform_device *pdev) pctrl->data = data; pctrl->dev = &pdev->dev; + if (of_property_read_bool(np, "qcom,adsp-bypass-mode")) + data->is_clk_optional = true; + pctrl->clks[0].id = "core"; pctrl->clks[1].id = "audio"; diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c index 2add9a4..3fc7de1 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c @@ -141,7 +141,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = { .ngroups = ARRAY_SIZE(sc7280_groups), .functions = sc7280_functions, .nfunctions = ARRAY_SIZE(sc7280_functions), - .is_clk_optional = true, + .is_clk_optional = false, }; static const struct of_device_id lpi_pinctrl_of_match[] = {