@@ -307,7 +307,7 @@
clocks = <&clks IMX6SX_CLK_SSI1_IPG>,
<&clks IMX6SX_CLK_SSI1>;
clock-names = "ipg", "baud";
- dmas = <&sdma 37 1 0>, <&sdma 38 1 0>;
+ dmas = <&sdma 37 22 0>, <&sdma 38 22 0>;
dma-names = "rx", "tx";
fsl,fifo-depth = <15>;
status = "disabled";
@@ -321,7 +321,7 @@
clocks = <&clks IMX6SX_CLK_SSI2_IPG>,
<&clks IMX6SX_CLK_SSI2>;
clock-names = "ipg", "baud";
- dmas = <&sdma 41 1 0>, <&sdma 42 1 0>;
+ dmas = <&sdma 41 22 0>, <&sdma 42 22 0>;
dma-names = "rx", "tx";
fsl,fifo-depth = <15>;
status = "disabled";
@@ -335,7 +335,7 @@
clocks = <&clks IMX6SX_CLK_SSI3_IPG>,
<&clks IMX6SX_CLK_SSI3>;
clock-names = "ipg", "baud";
- dmas = <&sdma 45 1 0>, <&sdma 46 1 0>;
+ dmas = <&sdma 45 22 0>, <&sdma 46 22 0>;
dma-names = "rx", "tx";
fsl,fifo-depth = <15>;
status = "disabled";
@@ -1002,8 +1002,8 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev,
wm = ssi_private->fifo_depth;
regmap_write(regs, CCSR_SSI_SFCSR,
- CCSR_SSI_SFCSR_TFWM0(wm) | CCSR_SSI_SFCSR_RFWM0(wm) |
- CCSR_SSI_SFCSR_TFWM1(wm) | CCSR_SSI_SFCSR_RFWM1(wm));
+ CCSR_SSI_SFCSR_TFWM0(8) | CCSR_SSI_SFCSR_RFWM0(8) |
+ CCSR_SSI_SFCSR_TFWM1(8) | CCSR_SSI_SFCSR_RFWM1(8));
if (ssi_private->use_dual_fifo) {
regmap_update_bits(regs, CCSR_SSI_SRCR, CCSR_SSI_SRCR_RFEN1,
@@ -1322,8 +1322,9 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
/* When using dual fifo mode, we need to keep watermark
* as even numbers due to dma script limitation.
*/
- ssi_private->dma_params_tx.maxburst &= ~0x1;
- ssi_private->dma_params_rx.maxburst &= ~0x1;
+ dev_info(&pdev->dev, "tunning burst size for Dual FIFO mode\n");
+ ssi_private->dma_params_tx.maxburst = 16;
+ ssi_private->dma_params_rx.maxburst = 16;
}
if (!ssi_private->use_dma) {