From patchwork Thu Oct 29 18:11:35 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 7520131 Return-Path: X-Original-To: patchwork-alsa-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id AC7A19F36A for ; Thu, 29 Oct 2015 18:12:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B6589207DD for ; Thu, 29 Oct 2015 18:11:59 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) by mail.kernel.org (Postfix) with ESMTP id E1C4F2065B for ; Thu, 29 Oct 2015 18:11:56 +0000 (UTC) Received: by alsa0.perex.cz (Postfix, from userid 1000) id D08A52652F1; Thu, 29 Oct 2015 19:11:55 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-2.5 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from alsa0.perex.cz (localhost [127.0.0.1]) by alsa0.perex.cz (Postfix) with ESMTP id 90479261ADA; Thu, 29 Oct 2015 19:11:47 +0100 (CET) X-Original-To: alsa-devel@alsa-project.org Delivered-To: alsa-devel@alsa-project.org Received: by alsa0.perex.cz (Postfix, from userid 1000) id 09968261B0A; Thu, 29 Oct 2015 19:11:47 +0100 (CET) Received: from mail-pa0-f42.google.com (mail-pa0-f42.google.com [209.85.220.42]) by alsa0.perex.cz (Postfix) with ESMTP id 0E87B26170F for ; Thu, 29 Oct 2015 19:11:40 +0100 (CET) Received: by padhk11 with SMTP id hk11so47516710pad.1 for ; Thu, 29 Oct 2015 11:11:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=date:from:to:cc:subject:message-id:references:mime-version :content-type:content-disposition:in-reply-to:user-agent; bh=iK+feKaLU8+urZZIGaVjqZToWNrAj64426Bx/Twp6ZI=; b=BHR8ZFjqJaFAzUM7o0tb8QIpsai3OMveFP9RugLQDHwQ6XwM8EaoAsavrN/3gKV6hM oUEEWsoM+YFWbUkIxaetv9fceqbe780raK0mFMd5pryulMPhM92xnQhuxnOaIoY6txaX FUh5r2JDk+cvvuP91cFfE+l6+9/GTPQeNI1RX/YII8fx6ih/B0k/WdhPzTUlvM9FwjN+ GHXgctwPowTh9N3ThZLpjtR/TZjiFP287C72+n3/O+dKSi31WP//yxT6MYmipOXmkvUo W6s6t+h7gNltRywA/rmM2n6Rp/fFOydYMNRDT7t04gCRFkSOAHx3Z7GDb/vnZDeUGbM+ Lriw== X-Received: by 10.68.139.2 with SMTP id qu2mr3271784pbb.135.1446142298347; Thu, 29 Oct 2015 11:11:38 -0700 (PDT) Received: from Asurada-CZ80 ([2601:646:8e01:403a:f8a2:d83f:acb0:4a70]) by smtp.gmail.com with ESMTPSA id ez1sm3604211pab.6.2015.10.29.11.11.37 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Thu, 29 Oct 2015 11:11:38 -0700 (PDT) Date: Thu, 29 Oct 2015 11:11:35 -0700 From: Nicolin Chen To: Caleb Crome Message-ID: <20151029181135.GB3492@Asurada-CZ80> References: <56273F75.2040702@invoxia.com> <20151027071344.GC25728@pengutronix.de> <20151027201101.GA9527@Asurada-CZ80> <20151029045350.GA3374@Asurada-CZ80> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Cc: Fabio Estevam , "alsa-devel@alsa-project.org" , Markus Pargmann , "arnaud.mouiche@invoxia.com" , Roberto Fichera , "shawn.guo@linaro.org" Subject: Re: [alsa-devel] fsl_ssi.c: Getting channel slips with fsl_ssi.c in TDM (network) mode. X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: alsa-devel-bounces@alsa-project.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Oct 29, 2015 at 07:55:59AM -0700, Caleb Crome wrote: > >> Therefore, if setting watermark to 8, each FIFO has 7 (15 - 8) space > >> left, the largest safe burst size could be 14 (7 * 2) actually. > > Oh, does this depend on the data size? I'm using 16-bit data, so I > > guess the bursts are measured in 2 byte units? Does this mean that > > the burst size should be dynamically adjusted depending on word size > > (I guess done in hw_params)? You don't need to do that. It's already been taken care in the DMA code. > Okay, so wm=8 and maxburst=14 definitely does not work at all,. wm=8, > maxburst=8 works okay, but still not perfect. Make sure you are using Dual FIFO configurations for both SDMA and SSI. You can refer to my change below (I've tested it with a two- channel test case being played in 44.1KHz 16-bit): And make sure you have the dev_info() printed out in your console. /* 22 in the DT is to call the Dual FIFO SDMA script */ > It started with: > > frame 0: 00, 00, 10, 20, 30, 40, 50, 60, 70, 80, 90, a0, b0, c0, d0, e0 > frame 1: f0, 01, 11, 21, 31, 41, 51, 61, 71, 81, 91, a1, b1, c1, d1, e1 If this happens, just try to let SDMA work before SSI starts to read FIFOs -- enabling TDMAE or RDMAE before enabling TE or RE: @@ -1093,6 +1093,15 @@ static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd, case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + regmap_update_bits(regs, CCSR_SSI_SIER, + CCSR_SSI_SIER_TDMAE, + CCSR_SSI_SIER_TDMAE); + else + regmap_update_bits(regs, CCSR_SSI_SIER, + CCSR_SSI_SIER_RDMAE, + CCSR_SSI_SIER_RDMAE); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) fsl_ssi_tx_config(ssi_private, true); else fsl_ssi_rx_config(ssi_private, true); Nicolin diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index b8a5056..f4c7308 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -307,7 +307,7 @@ clocks = <&clks IMX6SX_CLK_SSI1_IPG>, <&clks IMX6SX_CLK_SSI1>; clock-names = "ipg", "baud"; - dmas = <&sdma 37 1 0>, <&sdma 38 1 0>; + dmas = <&sdma 37 22 0>, <&sdma 38 22 0>; dma-names = "rx", "tx"; fsl,fifo-depth = <15>; status = "disabled"; @@ -321,7 +321,7 @@ clocks = <&clks IMX6SX_CLK_SSI2_IPG>, <&clks IMX6SX_CLK_SSI2>; clock-names = "ipg", "baud"; - dmas = <&sdma 41 1 0>, <&sdma 42 1 0>; + dmas = <&sdma 41 22 0>, <&sdma 42 22 0>; dma-names = "rx", "tx"; fsl,fifo-depth = <15>; status = "disabled"; @@ -335,7 +335,7 @@ clocks = <&clks IMX6SX_CLK_SSI3_IPG>, <&clks IMX6SX_CLK_SSI3>; clock-names = "ipg", "baud"; - dmas = <&sdma 45 1 0>, <&sdma 46 1 0>; + dmas = <&sdma 45 22 0>, <&sdma 46 22 0>; dma-names = "rx", "tx"; fsl,fifo-depth = <15>; status = "disabled"; diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 674abf7..7cfe661 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -1002,8 +1002,8 @@ static int _fsl_ssi_set_dai_fmt(struct device *dev, wm = ssi_private->fifo_depth; regmap_write(regs, CCSR_SSI_SFCSR, - CCSR_SSI_SFCSR_TFWM0(wm) | CCSR_SSI_SFCSR_RFWM0(wm) | - CCSR_SSI_SFCSR_TFWM1(wm) | CCSR_SSI_SFCSR_RFWM1(wm)); + CCSR_SSI_SFCSR_TFWM0(8) | CCSR_SSI_SFCSR_RFWM0(8) | + CCSR_SSI_SFCSR_TFWM1(8) | CCSR_SSI_SFCSR_RFWM1(8)); if (ssi_private->use_dual_fifo) { regmap_update_bits(regs, CCSR_SSI_SRCR, CCSR_SSI_SRCR_RFEN1, @@ -1322,8 +1322,9 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev, /* When using dual fifo mode, we need to keep watermark * as even numbers due to dma script limitation. */ - ssi_private->dma_params_tx.maxburst &= ~0x1; - ssi_private->dma_params_rx.maxburst &= ~0x1; + dev_info(&pdev->dev, "tunning burst size for Dual FIFO mode\n"); + ssi_private->dma_params_tx.maxburst = 16; + ssi_private->dma_params_rx.maxburst = 16; } if (!ssi_private->use_dma) {