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ASoC: Intel: Skylake: Fix a shift wrapping bug

Message ID 20161013085548.GK16198@mwanda (mailing list archive)
State Accepted
Commit c8eabf821cac120afb78ca251b07cbf520406a7e
Headers show

Commit Message

Dan Carpenter Oct. 13, 2016, 8:55 a.m. UTC 
"*val" is a u64.  It definitely looks like we intend to use the high 32
bits as well.

Fixes: 700a9a63f9c1 ("ASoC: Intel: Skylake: Add module instance id generation APIs")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>

Comments

Vinod Koul Oct. 18, 2016, 1:56 p.m. UTC | #1 
On Thu, Oct 13, 2016 at 11:55:48AM +0300, Dan Carpenter wrote:
> "*val" is a u64.  It definitely looks like we intend to use the high 32
> bits as well.
> 
> Fixes: 700a9a63f9c1 ("ASoC: Intel: Skylake: Add module instance id generation APIs")
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>

Acked-by: Vinod Koul <vinod.koul@intel.com>
Tested-by: Kranthi G <gudishax.kranthikumar@intel.com>
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Patch

diff --git a/sound/soc/intel/skylake/skl-sst-utils.c b/sound/soc/intel/skylake/skl-sst-utils.c
index 8dc0303..ea162fb 100644
--- a/sound/soc/intel/skylake/skl-sst-utils.c
+++ b/sound/soc/intel/skylake/skl-sst-utils.c
@@ -179,7 +179,7 @@  static inline int skl_getid_32(struct uuid_module *module, u64 *val,
 		index = ffz(mask_val);
 		pvt_id = index + word1_mask + word2_mask;
 		if (pvt_id <= (max_inst - 1)) {
-			*val |= 1 << (index + word1_mask);
+			*val |= 1ULL << (index + word1_mask);
 			return pvt_id;
 		}
 	}