| Message ID | 20180205154403.13520-2-s.nawrocki@samsung.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 647d04f8e07afc7c3b7a42b3ee01a8b28db29631 |
| Headers | show |
On Mon, Feb 5, 2018 at 4:43 PM, Sylwester Nawrocki <s.nawrocki@samsung.com> wrote: > If the RCLK mux clock configuration is specified in DT and no set_sysclk() > callback is used in the sound card driver the sclk_srcrate field will remain > set to 0, leading to an incorrect PSR divider setting. > To fix this the frequency value is retrieved from the CLK_I2S_RCLK_SRC clock, > so the actual RCLK mux selection is taken into account. > > Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> > --- > sound/soc/samsung/i2s.c | 13 +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Best regards, Krzysztof
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c index 233f1c9a4b6c..aeba0ae890ea 100644 --- a/sound/soc/samsung/i2s.c +++ b/sound/soc/samsung/i2s.c @@ -656,8 +656,12 @@ static int i2s_set_fmt(struct snd_soc_dai *dai, tmp |= mod_slave; break; case SND_SOC_DAIFMT_CBS_CFS: - /* Set default source clock in Master mode */ - if (i2s->rclk_srcrate == 0) + /* + * Set default source clock in Master mode, only when the + * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any + * clock configuration assigned in DT is not overwritten. + */ + if (i2s->rclk_srcrate == 0 && i2s->clk_data.clks == NULL) i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0, 0, SND_SOC_CLOCK_IN); break; @@ -881,6 +885,11 @@ static int config_setup(struct i2s_dai *i2s) return 0; if (!(i2s->quirks & QUIRK_NO_MUXPSR)) { + struct clk *rclksrc = i2s->clk_table[CLK_I2S_RCLK_SRC]; + + if (i2s->rclk_srcrate == 0 && rclksrc && !IS_ERR(rclksrc)) + i2s->rclk_srcrate = clk_get_rate(rclksrc); + psr = i2s->rclk_srcrate / i2s->frmclk / rfs; writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR); dev_dbg(&i2s->pdev->dev,
If the RCLK mux clock configuration is specified in DT and no set_sysclk() callback is used in the sound card driver the sclk_srcrate field will remain set to 0, leading to an incorrect PSR divider setting. To fix this the frequency value is retrieved from the CLK_I2S_RCLK_SRC clock, so the actual RCLK mux selection is taken into account. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> --- sound/soc/samsung/i2s.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)