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[86.30.250.44]) by smtp.gmail.com with ESMTPSA id f20sm2373247wmb.6.2019.10.29.04.29.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 04:29:03 -0700 (PDT) From: Srinivas Kandagatla To: robh@kernel.org, broonie@kernel.org, lee.jones@linaro.org, linus.walleij@linaro.org Date: Tue, 29 Oct 2019 11:26:57 +0000 Message-Id: <20191029112700.14548-9-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191029112700.14548-1-srinivas.kandagatla@linaro.org> References: <20191029112700.14548-1-srinivas.kandagatla@linaro.org> MIME-Version: 1.0 Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, bgoswami@codeaurora.org, vinod.koul@linaro.org, spapothi@codeaurora.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Srinivas Kandagatla Subject: [alsa-devel] [PATCH v3 08/11] dt-bindings: pinctrl: qcom-wcd934x: Add bindings for gpio X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Qualcomm Technologies Inc WCD9340/WCD9341 Audio Codec has integrated gpio controller to control 5 gpios on the chip. This patch adds required device tree bindings for it. Signed-off-by: Srinivas Kandagatla --- .../pinctrl/qcom,wcd934x-pinctrl.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,wcd934x-pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,wcd934x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,wcd934x-pinctrl.yaml new file mode 100644 index 000000000000..432486d753b3 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,wcd934x-pinctrl.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,wcd934x-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: WCD9340/WCD9341 GPIO Pin controller + +maintainers: + - Srinivas Kandagatla + +description: | + Qualcomm Technologies Inc WCD9340/WCD9341 Audio Codec has integrated + gpio controller to control 5 gpios on the chip. + +properties: + compatible: + enum: + - qcom,wcd9340-pinctrl + - qcom,wcd9341-pinctrl + + reg: + maxItems: 1 + + gpio-controller: true + + gpio-ranges: + maxItems: 1 + + '#gpio-cells': + const: 2 + +required: + - compatible + - reg + - gpio-controller + - gpio-ranges + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + wcdpinctrl: pinctrl@42 { + compatible = "qcom,wcd9340-pinctrl"; + reg = <0x042 0x2>; + gpio-controller; + gpio-ranges = <&wcdpinctrl 0 0 5>; + #gpio-cells = <2>; + }; + +...