diff mbox series

[v4] topology: Add topology file for generic HDA DSP machine driver

Message ID 20200421202615.4111-1-mateusz.gorski@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [v4] topology: Add topology file for generic HDA DSP machine driver | expand

Commit Message

Gorski, Mateusz April 21, 2020, 8:26 p.m. UTC 
Provide conf file with topology for generic HDA DSP machine
driver configuration. This topology is meant to be used with Intel
Skylake SST driver.

Signed-off-by: Mateusz Gorski <mateusz.gorski@linux.intel.com>
---

Changes in v4:
- changed get and put enum ops for DMIC paths
- removed "write" and "read_write" rights for DMIC multi-config enums

 .../hda-dsp/skl_hda_dsp_generic-tplg.conf     | 8265 +++++++++++++++++
 1 file changed, 8265 insertions(+)
 create mode 100644 topology/hda-dsp/skl_hda_dsp_generic-tplg.conf

Comments

Cezary Rojewski May 4, 2020, 10:27 a.m. UTC | #1 
On 2020-04-21 22:26, Mateusz Gorski wrote:
> Provide conf file with topology for generic HDA DSP machine
> driver configuration. This topology is meant to be used with Intel
> Skylake SST driver.
> 
> Signed-off-by: Mateusz Gorski <mateusz.gorski@linux.intel.com>
> ---
> 
> Changes in v4:
> - changed get and put enum ops for DMIC paths
> - removed "write" and "read_write" rights for DMIC multi-config enums
> 

Hello Jaroslav,

Kernel patch series:
	[PATCH v6 0/3] Add support for different DMIC configurations

has already been merged by Mark and is now part of Skylake driver. UCM 
and topology patches are still missing though. I didn't find any review 
or issue that has not been addressed. Is there anything else you want us 
to do before merging? Patches have been tested using the exact same 
scope as kernel ones: Intel AVS platforms, RVP and production both.

Czarek
Jaroslav Kysela May 4, 2020, 11:44 a.m. UTC | #2 
Dne 21. 04. 20 v 22:26 Mateusz Gorski napsal(a):
> Provide conf file with topology for generic HDA DSP machine
> driver configuration. This topology is meant to be used with Intel
> Skylake SST driver.
> 
> Signed-off-by: Mateusz Gorski <mateusz.gorski@linux.intel.com>
> ---
> 
> Changes in v4:
> - changed get and put enum ops for DMIC paths
> - removed "write" and "read_write" rights for DMIC multi-config enums
> 
>   .../hda-dsp/skl_hda_dsp_generic-tplg.conf     | 8265 +++++++++++++++++
>   1 file changed, 8265 insertions(+)
>   create mode 100644 topology/hda-dsp/skl_hda_dsp_generic-tplg.conf



Applied to the alsa-topology-conf repository. Thank you.

				Jaroslav
diff mbox series

Patch

diff --git a/topology/hda-dsp/skl_hda_dsp_generic-tplg.conf b/topology/hda-dsp/skl_hda_dsp_generic-tplg.conf
new file mode 100644
index 0000000..32ba9a7
--- /dev/null
+++ b/topology/hda-dsp/skl_hda_dsp_generic-tplg.conf
@@ -0,0 +1,8265 @@ 
+
+SectionVendorTokens."skl_tokens" {
+    SKL_TKN_UUID "1"
+    SKL_TKN_U8_NUM_BLOCKS "2"
+    SKL_TKN_U8_BLOCK_TYPE "3"
+    SKL_TKN_U8_IN_PIN_TYPE "4"
+    SKL_TKN_U8_OUT_PIN_TYPE "5"
+    SKL_TKN_U8_DYN_IN_PIN "6"
+    SKL_TKN_U8_DYN_OUT_PIN "7"
+    SKL_TKN_U8_IN_QUEUE_COUNT "8"
+    SKL_TKN_U8_OUT_QUEUE_COUNT "9"
+    SKL_TKN_U8_TIME_SLOT "10"
+    SKL_TKN_U8_CORE_ID "11"
+    SKL_TKN_U8_MODULE_TYPE "12"
+    SKL_TKN_U8_CONN_TYPE "13"
+    SKL_TKN_U8_DEV_TYPE "14"
+    SKL_TKN_U8_HW_CONN_TYPE "15"
+    SKL_TKN_U16_MOD_INST_ID "16"
+    SKL_TKN_U16_BLOCK_SIZE "17"
+    SKL_TKN_U32_MAX_MCPS "18"
+    SKL_TKN_U32_MEM_PAGES "19"
+    SKL_TKN_U32_OBS "20"
+    SKL_TKN_U32_IBS "21"
+    SKL_TKN_U32_VBUS_ID "22"
+    SKL_TKN_U32_PARAMS_FIXUP "23"
+    SKL_TKN_U32_CONVERTER "24"
+    SKL_TKN_U32_PIPE_ID "25"
+    SKL_TKN_U32_PIPE_CONN_TYPE "26"
+    SKL_TKN_U32_PIPE_PRIORITY "27"
+    SKL_TKN_U32_PIPE_MEM_PGS "28"
+    SKL_TKN_U32_DIR_PIN_COUNT "29"
+    SKL_TKN_U32_FMT_CH "30"
+    SKL_TKN_U32_FMT_FREQ "31"
+    SKL_TKN_U32_FMT_BIT_DEPTH "32"
+    SKL_TKN_U32_FMT_SAMPLE_SIZE "33"
+    SKL_TKN_U32_FMT_CH_CONFIG "34"
+    SKL_TKN_U32_FMT_INTERLEAVE "35"
+    SKL_TKN_U32_FMT_SAMPLE_TYPE "36"
+    SKL_TKN_U32_FMT_CH_MAP "37"
+    SKL_TKN_U32_PIN_MOD_ID "38"
+    SKL_TKN_U32_PIN_INST_ID "39"
+    SKL_TKN_U32_MOD_SET_PARAMS "40"
+    SKL_TKN_U32_MOD_PARAM_ID "41"
+    SKL_TKN_U32_CAPS_SET_PARAMS "42"
+    SKL_TKN_U32_CAPS_PARAMS_ID "43"
+    SKL_TKN_U32_CAPS_SIZE "44"
+    SKL_TKN_U32_PROC_DOMAIN "45"
+    SKL_TKN_U32_LIB_COUNT "46"
+    SKL_TKN_STR_LIB_NAME "47"
+    SKL_TKN_U32_PMODE "48"
+    SKL_TKN_U32_D0I3_CAPS "49"
+    SKL_TKN_U32_DMA_BUF_SIZE "50"
+    SKL_TKN_U32_PIPE_DIRECTION "51"
+    SKL_TKN_U32_PIPE_CONFIG_ID "52"
+    SKL_TKN_U32_NUM_CONFIGS "53"
+    SKL_TKN_U32_PATH_MEM_PGS "54"
+    SKL_TKN_U32_CFG_FREQ "55"
+    SKL_TKN_U8_CFG_CHAN "56"
+    SKL_TKN_U8_CFG_BPS "57"
+    SKL_TKN_CFG_MOD_RES_ID "58"
+    SKL_TKN_CFG_MOD_FMT_ID "59"
+    SKL_TKN_U8_NUM_MOD "60"
+    SKL_TKN_MM_U8_MOD_IDX "61"
+    SKL_TKN_MM_U8_NUM_RES "62"
+    SKL_TKN_MM_U8_NUM_INTF "63"
+    SKL_TKN_MM_U32_RES_ID "64"
+    SKL_TKN_MM_U32_CPS "65"
+    SKL_TKN_MM_U32_DMA_SIZE "66"
+    SKL_TKN_MM_U32_CPC "67"
+    SKL_TKN_MM_U32_RES_PIN_ID "68"
+    SKL_TKN_MM_U32_INTF_PIN_ID "69"
+    SKL_TKN_MM_U32_PIN_BUF "70"
+    SKL_TKN_MM_U32_FMT_ID "71"
+    SKL_TKN_MM_U32_NUM_IN_FMT "72"
+    SKL_TKN_MM_U32_NUM_OUT_FMT "73"
+    SKL_TKN_U32_ASTATE_IDX "74"
+    SKL_TKN_U32_ASTATE_COUNT "75"
+    SKL_TKN_U32_ASTATE_KCPS "76"
+    SKL_TKN_U32_ASTATE_CLK_SRC "77"
+    SKL_TKN_U32_DMACTRL_CFG_IDX "82"
+    SKL_TKN_U32_DMACTRL_CFG_SIZE "83"
+    SKL_TKN_U32_DMA_IDX "84"
+    SKL_TKN_U32_DMA_TYPE "85"
+    SKL_TKN_U32_DMA_SIZE "86"
+    SKL_TKN_U32_DMA_MAX_SIZE "87"
+    SKL_TKN_U32_DMA_MIN_SIZE "88"
+    SKL_TKN_U32_SCH_TYPE "89"
+    SKL_TKN_U32_SCH_SIZE "90"
+    SKL_TKN_U32_SCH_SYS_TICK_MUL "91"
+    SKL_TKN_U32_SCH_SYS_TICK_DIV "92"
+    SKL_TKN_U32_SCH_SYS_TICK_LL_SRC "93"
+    SKL_TKN_U32_SCH_SYS_TICK_CFG_LEN "94"
+    SKL_TKN_U32_SCH_SYS_TICK_CFG "95"
+    SKL_TKN_U32_FMT_CFG_IDX "96"
+}
+
+SectionVendorTuples."mod_type_data_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "6436"
+    }
+}
+
+SectionData."mod_type_data_size_desc" {
+    tuples "mod_type_data_size_desc"
+}
+
+SectionVendorTuples."mod_type_data" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_mod" {
+        SKL_TKN_U8_NUM_MOD "5"
+    }
+
+    tuples."uuid.mod_0" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."byte.u8_mod_type_0" {
+        SKL_TKN_MM_U8_MOD_IDX "0"
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_IN_QUEUE_COUNT "1"
+        SKL_TKN_U8_OUT_QUEUE_COUNT "3"
+        SKL_TKN_MM_U8_NUM_RES "2"
+        SKL_TKN_MM_U8_NUM_INTF "2"
+    }
+
+    tuples."word.u32_mod_type_0_res_0" {
+        SKL_TKN_MM_U32_RES_ID "0"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "2666000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "0"
+        SKL_TKN_MM_U32_CPC "2666"
+    }
+
+    tuples."word.u32_mod_type_0_res_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_0_res_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_0_res_1" {
+        SKL_TKN_MM_U32_RES_ID "1"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "2666000"
+        SKL_TKN_U32_IBS "768"
+        SKL_TKN_U32_OBS "768"
+        SKL_TKN_MM_U32_DMA_SIZE "0"
+        SKL_TKN_MM_U32_CPC "2666"
+    }
+
+    tuples."word.u32_mod_type_0_res_1_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "768"
+    }
+
+    tuples."word.u32_mod_type_0_res_1_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "768"
+    }
+
+    tuples."word.u32_mod_type_0_intf_0" {
+        SKL_TKN_MM_U32_FMT_ID "0"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_0_intf_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_0_intf_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_0_intf_1" {
+        SKL_TKN_MM_U32_FMT_ID "1"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_0_intf_1_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294914576"
+    }
+
+    tuples."word.u32_mod_type_0_intf_1_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."uuid.mod_1" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."byte.u8_mod_type_1" {
+        SKL_TKN_MM_U8_MOD_IDX "1"
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_IN_QUEUE_COUNT "8"
+        SKL_TKN_U8_OUT_QUEUE_COUNT "1"
+        SKL_TKN_MM_U8_NUM_RES "2"
+        SKL_TKN_MM_U8_NUM_INTF "2"
+    }
+
+    tuples."word.u32_mod_type_1_res_0" {
+        SKL_TKN_MM_U32_RES_ID "0"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "1521000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "0"
+        SKL_TKN_MM_U32_CPC "1521"
+    }
+
+    tuples."word.u32_mod_type_1_res_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_1_res_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_1_res_1" {
+        SKL_TKN_MM_U32_RES_ID "1"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "2666000"
+        SKL_TKN_U32_IBS "768"
+        SKL_TKN_U32_OBS "768"
+        SKL_TKN_MM_U32_DMA_SIZE "0"
+        SKL_TKN_MM_U32_CPC "2666"
+    }
+
+    tuples."word.u32_mod_type_1_res_1_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "768"
+    }
+
+    tuples."word.u32_mod_type_1_res_1_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "768"
+    }
+
+    tuples."word.u32_mod_type_1_intf_0" {
+        SKL_TKN_MM_U32_FMT_ID "0"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_1_intf_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_1_intf_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_1_intf_1" {
+        SKL_TKN_MM_U32_FMT_ID "1"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_1_intf_1_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294914576"
+    }
+
+    tuples."word.u32_mod_type_1_intf_1_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."uuid.mod_2" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_mod_type_2" {
+        SKL_TKN_MM_U8_MOD_IDX "2"
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_IN_QUEUE_COUNT "1"
+        SKL_TKN_U8_OUT_QUEUE_COUNT "4"
+        SKL_TKN_MM_U8_NUM_RES "15"
+        SKL_TKN_MM_U8_NUM_INTF "15"
+    }
+
+    tuples."word.u32_mod_type_2_res_0" {
+        SKL_TKN_MM_U32_RES_ID "0"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "2581000"
+        SKL_TKN_U32_IBS "192"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "384"
+        SKL_TKN_MM_U32_CPC "2581"
+    }
+
+    tuples."word.u32_mod_type_2_res_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "192"
+    }
+
+    tuples."word.u32_mod_type_2_res_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_1" {
+        SKL_TKN_MM_U32_RES_ID "1"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "1000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "768"
+        SKL_TKN_MM_U32_CPC "1"
+    }
+
+    tuples."word.u32_mod_type_2_res_1_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_1_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_2" {
+        SKL_TKN_MM_U32_RES_ID "2"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "3812000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "768"
+        SKL_TKN_MM_U32_CPC "3812"
+    }
+
+    tuples."word.u32_mod_type_2_res_2_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_2_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_3" {
+        SKL_TKN_MM_U32_RES_ID "3"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "4473000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "768"
+        SKL_TKN_MM_U32_CPC "4473"
+    }
+
+    tuples."word.u32_mod_type_2_res_3_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_3_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_4" {
+        SKL_TKN_MM_U32_RES_ID "4"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "1000"
+        SKL_TKN_U32_IBS "192"
+        SKL_TKN_U32_OBS "192"
+        SKL_TKN_MM_U32_DMA_SIZE "384"
+        SKL_TKN_MM_U32_CPC "1"
+    }
+
+    tuples."word.u32_mod_type_2_res_4_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "192"
+    }
+
+    tuples."word.u32_mod_type_2_res_4_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "192"
+    }
+
+    tuples."word.u32_mod_type_2_res_5" {
+        SKL_TKN_MM_U32_RES_ID "5"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "1000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "768"
+        SKL_TKN_MM_U32_CPC "1"
+    }
+
+    tuples."word.u32_mod_type_2_res_5_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_5_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_6" {
+        SKL_TKN_MM_U32_RES_ID "6"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "1000"
+        SKL_TKN_U32_IBS "768"
+        SKL_TKN_U32_OBS "768"
+        SKL_TKN_MM_U32_DMA_SIZE "1536"
+        SKL_TKN_MM_U32_CPC "1"
+    }
+
+    tuples."word.u32_mod_type_2_res_6_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "768"
+    }
+
+    tuples."word.u32_mod_type_2_res_6_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "768"
+    }
+
+    tuples."word.u32_mod_type_2_res_7" {
+        SKL_TKN_MM_U32_RES_ID "7"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "1000"
+        SKL_TKN_U32_IBS "1536"
+        SKL_TKN_U32_OBS "1536"
+        SKL_TKN_MM_U32_DMA_SIZE "3072"
+        SKL_TKN_MM_U32_CPC "1"
+    }
+
+    tuples."word.u32_mod_type_2_res_7_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "1536"
+    }
+
+    tuples."word.u32_mod_type_2_res_7_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "1536"
+    }
+
+    tuples."word.u32_mod_type_2_res_8" {
+        SKL_TKN_MM_U32_RES_ID "8"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "579000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "192"
+        SKL_TKN_MM_U32_DMA_SIZE "768"
+        SKL_TKN_MM_U32_CPC "579"
+    }
+
+    tuples."word.u32_mod_type_2_res_8_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_8_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "192"
+    }
+
+    tuples."word.u32_mod_type_2_res_9" {
+        SKL_TKN_MM_U32_RES_ID "9"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "3812000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "768"
+        SKL_TKN_MM_U32_CPC "3812"
+    }
+
+    tuples."word.u32_mod_type_2_res_9_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_9_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_10" {
+        SKL_TKN_MM_U32_RES_ID "10"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "3812000"
+        SKL_TKN_U32_IBS "192"
+        SKL_TKN_U32_OBS "192"
+        SKL_TKN_MM_U32_DMA_SIZE "768"
+        SKL_TKN_MM_U32_CPC "3812"
+    }
+
+    tuples."word.u32_mod_type_2_res_10_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "192"
+    }
+
+    tuples."word.u32_mod_type_2_res_10_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "192"
+    }
+
+    tuples."word.u32_mod_type_2_res_11" {
+        SKL_TKN_MM_U32_RES_ID "11"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "3812000"
+        SKL_TKN_U32_IBS "192"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "768"
+        SKL_TKN_MM_U32_CPC "3812"
+    }
+
+    tuples."word.u32_mod_type_2_res_11_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "192"
+    }
+
+    tuples."word.u32_mod_type_2_res_11_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_12" {
+        SKL_TKN_MM_U32_RES_ID "12"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "3812000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "192"
+        SKL_TKN_MM_U32_DMA_SIZE "768"
+        SKL_TKN_MM_U32_CPC "3812"
+    }
+
+    tuples."word.u32_mod_type_2_res_12_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_12_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "192"
+    }
+
+    tuples."word.u32_mod_type_2_res_13" {
+        SKL_TKN_MM_U32_RES_ID "13"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "3812000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "768"
+        SKL_TKN_MM_U32_DMA_SIZE "1536"
+        SKL_TKN_MM_U32_CPC "3812"
+    }
+
+    tuples."word.u32_mod_type_2_res_13_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_res_13_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "768"
+    }
+
+    tuples."word.u32_mod_type_2_res_14" {
+        SKL_TKN_MM_U32_RES_ID "14"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "3812000"
+        SKL_TKN_U32_IBS "768"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "1536"
+        SKL_TKN_MM_U32_CPC "3812"
+    }
+
+    tuples."word.u32_mod_type_2_res_14_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "768"
+    }
+
+    tuples."word.u32_mod_type_2_res_14_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_2_intf_0" {
+        SKL_TKN_MM_U32_FMT_ID "0"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_1" {
+        SKL_TKN_MM_U32_FMT_ID "1"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_1_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_1_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_2" {
+        SKL_TKN_MM_U32_FMT_ID "2"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_2_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_2_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_3" {
+        SKL_TKN_MM_U32_FMT_ID "3"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_3_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_3_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "24"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_4" {
+        SKL_TKN_MM_U32_FMT_ID "4"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_4_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_4_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_5" {
+        SKL_TKN_MM_U32_FMT_ID "5"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_5_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294914576"
+    }
+
+    tuples."word.u32_mod_type_2_intf_5_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294914576"
+    }
+
+    tuples."word.u32_mod_type_2_intf_6" {
+        SKL_TKN_MM_U32_FMT_ID "6"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_6_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "6"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "8"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4283707920"
+    }
+
+    tuples."word.u32_mod_type_2_intf_6_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "6"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "8"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4283707920"
+    }
+
+    tuples."word.u32_mod_type_2_intf_7" {
+        SKL_TKN_MM_U32_FMT_ID "7"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_7_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "8"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "14"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "1985229328"
+    }
+
+    tuples."word.u32_mod_type_2_intf_7_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "8"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "14"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "1985229328"
+    }
+
+    tuples."word.u32_mod_type_2_intf_8" {
+        SKL_TKN_MM_U32_FMT_ID "8"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_8_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_8_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_9" {
+        SKL_TKN_MM_U32_FMT_ID "9"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_9_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_9_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_10" {
+        SKL_TKN_MM_U32_FMT_ID "10"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_10_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_10_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_11" {
+        SKL_TKN_MM_U32_FMT_ID "11"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_11_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_11_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_12" {
+        SKL_TKN_MM_U32_FMT_ID "12"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_12_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_12_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_2_intf_13" {
+        SKL_TKN_MM_U32_FMT_ID "13"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_13_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294914576"
+    }
+
+    tuples."word.u32_mod_type_2_intf_13_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294914576"
+    }
+
+    tuples."word.u32_mod_type_2_intf_14" {
+        SKL_TKN_MM_U32_FMT_ID "14"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_2_intf_14_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294914576"
+    }
+
+    tuples."word.u32_mod_type_2_intf_14_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "4"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "16"
+        SKL_TKN_U32_FMT_CH_CONFIG "5"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "16"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294914576"
+    }
+
+    tuples."uuid.mod_3" {
+        SKL_TKN_UUID "12, 6, 248, 66, 47, 131, 191, 77, 178, 71, 81, 233, 97, 153, 123, 52"
+    }
+
+    tuples."byte.u8_mod_type_3" {
+        SKL_TKN_MM_U8_MOD_IDX "3"
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_IN_QUEUE_COUNT "1"
+        SKL_TKN_U8_OUT_QUEUE_COUNT "1"
+        SKL_TKN_MM_U8_NUM_RES "1"
+        SKL_TKN_MM_U8_NUM_INTF "1"
+    }
+
+    tuples."word.u32_mod_type_3_res_0" {
+        SKL_TKN_MM_U32_RES_ID "0"
+        SKL_TKN_U32_MEM_PAGES "1"
+        SKL_TKN_MM_U32_CPS "100000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "0"
+        SKL_TKN_MM_U32_CPC "2106"
+    }
+
+    tuples."word.u32_mod_type_3_res_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_3_res_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_3_intf_0" {
+        SKL_TKN_MM_U32_FMT_ID "0"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_3_intf_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_3_intf_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."uuid.mod_4" {
+        SKL_TKN_UUID "141, 178, 27, 230, 154, 20, 31, 76, 183, 9, 70, 130, 62, 245, 245, 174"
+    }
+
+    tuples."byte.u8_mod_type_4" {
+        SKL_TKN_MM_U8_MOD_IDX "4"
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_IN_QUEUE_COUNT "1"
+        SKL_TKN_U8_OUT_QUEUE_COUNT "1"
+        SKL_TKN_MM_U8_NUM_RES "1"
+        SKL_TKN_MM_U8_NUM_INTF "1"
+    }
+
+    tuples."word.u32_mod_type_4_res_0" {
+        SKL_TKN_MM_U32_RES_ID "0"
+        SKL_TKN_U32_MEM_PAGES "4"
+        SKL_TKN_MM_U32_CPS "100000"
+        SKL_TKN_U32_IBS "384"
+        SKL_TKN_U32_OBS "384"
+        SKL_TKN_MM_U32_DMA_SIZE "0"
+        SKL_TKN_MM_U32_CPC "10157"
+    }
+
+    tuples."word.u32_mod_type_4_res_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_4_res_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_RES_PIN_ID "0"
+        SKL_TKN_MM_U32_PIN_BUF "384"
+    }
+
+    tuples."word.u32_mod_type_4_intf_0" {
+        SKL_TKN_MM_U32_FMT_ID "0"
+        SKL_TKN_MM_U32_NUM_IN_FMT "1"
+        SKL_TKN_MM_U32_NUM_OUT_FMT "1"
+    }
+
+    tuples."word.u32_mod_type_4_intf_0_input_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+
+    tuples."word.u32_mod_type_4_intf_0_output_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_MM_U32_INTF_PIN_ID "0"
+        SKL_TKN_U32_FMT_CH "2"
+        SKL_TKN_U32_FMT_FREQ "48000"
+        SKL_TKN_U32_FMT_BIT_DEPTH "32"
+        SKL_TKN_U32_FMT_CH_CONFIG "1"
+        SKL_TKN_U32_FMT_INTERLEAVE "0"
+        SKL_TKN_U32_FMT_SAMPLE_SIZE "32"
+        SKL_TKN_U32_FMT_SAMPLE_TYPE "0"
+        SKL_TKN_U32_FMT_CH_MAP "4294967056"
+    }
+}
+
+SectionData."mod_type_data" {
+    tuples "mod_type_data"
+}
+
+SectionVendorTuples."media0_in cpr 0 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media0_in cpr 0 num_desc" {
+    tuples "media0_in cpr 0 num_desc"
+}
+
+SectionVendorTuples."media0_in cpr 0_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "500"
+    }
+}
+
+SectionData."media0_in cpr 0_size_desc" {
+    tuples "media0_in cpr 0_size_desc"
+}
+
+SectionVendorTuples."media0_in cpr 0" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "1"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "0"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "0"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "1"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "8"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "7"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "12, 6, 248, 66, 47, 131, 191, 77, 178, 71, 81, 233, 97, 153, 123, 52"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."media0_in cpr 0" {
+    tuples "media0_in cpr 0"
+}
+
+SectionWidget."media0_in cpr 0" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "media0_in cpr 0 num_desc"
+        "media0_in cpr 0_size_desc"
+        "media0_in cpr 0"
+    ]
+}
+
+SectionVendorTuples."media0_in updwmix 0 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media0_in updwmix 0 num_desc" {
+    tuples "media0_in updwmix 0 num_desc"
+}
+
+SectionVendorTuples."media0_in updwmix 0_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "388"
+    }
+}
+
+SectionData."media0_in updwmix 0_size_desc" {
+    tuples "media0_in updwmix 0_size_desc"
+}
+
+SectionVendorTuples."media0_in updwmix 0" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "12, 6, 248, 66, 47, 131, 191, 77, 178, 71, 81, 233, 97, 153, 123, 52"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "2"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "0"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "0"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "1"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "8"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "8"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "141, 178, 27, 230, 154, 20, 31, 76, 183, 9, 70, 130, 62, 245, 245, 174"
+    }
+}
+
+SectionData."media0_in updwmix 0" {
+    tuples "media0_in updwmix 0"
+}
+
+SectionWidget."media0_in updwmix 0" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    event_type "4"
+
+    data [
+        "media0_in updwmix 0 num_desc"
+        "media0_in updwmix 0_size_desc"
+        "media0_in updwmix 0"
+    ]
+}
+
+SectionVendorTuples."media0_in srcintc 0 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media0_in srcintc 0 num_desc" {
+    tuples "media0_in srcintc 0 num_desc"
+}
+
+SectionVendorTuples."media0_in srcintc 0_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "388"
+    }
+}
+
+SectionData."media0_in srcintc 0_size_desc" {
+    tuples "media0_in srcintc 0_size_desc"
+}
+
+SectionVendorTuples."media0_in srcintc 0" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "141, 178, 27, 230, 154, 20, 31, 76, 183, 9, 70, 130, 62, 245, 245, 174"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "3"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "0"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "0"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "1"
+        SKL_TKN_U32_PROC_DOMAIN "1"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "8"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "7"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "12, 6, 248, 66, 47, 131, 191, 77, 178, 71, 81, 233, 97, 153, 123, 52"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+}
+
+SectionData."media0_in srcintc 0" {
+    tuples "media0_in srcintc 0"
+}
+
+SectionWidget."media0_in srcintc 0" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    event_type "4"
+
+    data [
+        "media0_in srcintc 0 num_desc"
+        "media0_in srcintc 0_size_desc"
+        "media0_in srcintc 0"
+    ]
+}
+
+SectionVendorTuples."media0_in mi num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media0_in mi num_desc" {
+    tuples "media0_in mi num_desc"
+}
+
+SectionVendorTuples."media0_in mi_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "416"
+    }
+}
+
+SectionData."media0_in mi_size_desc" {
+    tuples "media0_in mi_size_desc"
+}
+
+SectionVendorTuples."media0_in mi" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "0"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "0"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "1"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "8"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "8"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "141, 178, 27, 230, 154, 20, 31, 76, 183, 9, 70, 130, 62, 245, 245, 174"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."media0_in mi" {
+    tuples "media0_in mi"
+}
+
+SectionWidget."media0_in mi" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "media0_in mi num_desc"
+        "media0_in mi_size_desc"
+        "media0_in mi"
+    ]
+}
+
+SectionVendorTuples."codec0_out mo num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec0_out mo num_desc" {
+    tuples "codec0_out mo num_desc"
+}
+
+SectionVendorTuples."codec0_out mo_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "536"
+    }
+}
+
+SectionData."codec0_out mo_size_desc" {
+    tuples "codec0_out mo_size_desc"
+}
+
+SectionVendorTuples."codec0_out mo" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "0"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "1"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_4" {
+        SKL_TKN_U32_DIR_PIN_COUNT "64"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_5" {
+        SKL_TKN_U32_DIR_PIN_COUNT "80"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_6" {
+        SKL_TKN_U32_DIR_PIN_COUNT "96"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_7" {
+        SKL_TKN_U32_DIR_PIN_COUNT "112"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "1"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+}
+
+SectionData."codec0_out mo" {
+    tuples "codec0_out mo"
+}
+
+SectionWidget."codec0_out mo" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    subseq "10"
+    event_type "1"
+    event_flags "15"
+
+    mixer [
+        "media0_in mi Switch"
+    ]
+
+    data [
+        "codec0_out mo num_desc"
+        "codec0_out mo_size_desc"
+        "codec0_out mo"
+    ]
+}
+
+SectionVendorTuples."codec0_out cpr 1 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec0_out cpr 1 num_desc" {
+    tuples "codec0_out cpr 1 num_desc"
+}
+
+SectionVendorTuples."codec0_out cpr 1_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "440"
+    }
+}
+
+SectionData."codec0_out cpr 1_size_desc" {
+    tuples "codec0_out cpr 1_size_desc"
+}
+
+SectionVendorTuples."codec0_out cpr 1" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "2"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "4"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "1"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "1"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "1"
+        SKL_TKN_CFG_MOD_FMT_ID "1"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "1"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."codec0_out cpr 1" {
+    tuples "codec0_out cpr 1"
+}
+
+SectionWidget."codec0_out cpr 1" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    event_type "4"
+
+    data [
+        "codec0_out cpr 1 num_desc"
+        "codec0_out cpr 1_size_desc"
+        "codec0_out cpr 1"
+    ]
+}
+
+SectionWidget."codec0_out" {
+    index "0"
+    type "aif_out"
+    no_pm "true"
+}
+
+SectionVendorTuples."media1_in cpr 2 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media1_in cpr 2 num_desc" {
+    tuples "media1_in cpr 2 num_desc"
+}
+
+SectionVendorTuples."media1_in cpr 2_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "500"
+    }
+}
+
+SectionData."media1_in cpr 2_size_desc" {
+    tuples "media1_in cpr 2_size_desc"
+}
+
+SectionVendorTuples."media1_in cpr 2" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "1"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "2"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "2"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "1"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "1"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."media1_in cpr 2" {
+    tuples "media1_in cpr 2"
+}
+
+SectionWidget."media1_in cpr 2" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "media1_in cpr 2 num_desc"
+        "media1_in cpr 2_size_desc"
+        "media1_in cpr 2"
+    ]
+}
+
+SectionVendorTuples."media1_in mi num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media1_in mi num_desc" {
+    tuples "media1_in mi num_desc"
+}
+
+SectionVendorTuples."media1_in mi_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "416"
+    }
+}
+
+SectionData."media1_in mi_size_desc" {
+    tuples "media1_in mi_size_desc"
+}
+
+SectionVendorTuples."media1_in mi" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "1"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "2"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "1"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "2"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."media1_in mi" {
+    tuples "media1_in mi"
+}
+
+SectionWidget."media1_in mi" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "media1_in mi num_desc"
+        "media1_in mi_size_desc"
+        "media1_in mi"
+    ]
+}
+
+SectionVendorTuples."codec1_out mo num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec1_out mo num_desc" {
+    tuples "codec1_out mo num_desc"
+}
+
+SectionVendorTuples."codec1_out mo_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "536"
+    }
+}
+
+SectionData."codec1_out mo_size_desc" {
+    tuples "codec1_out mo_size_desc"
+}
+
+SectionVendorTuples."codec1_out mo" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "1"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "3"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_4" {
+        SKL_TKN_U32_DIR_PIN_COUNT "64"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_5" {
+        SKL_TKN_U32_DIR_PIN_COUNT "80"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_6" {
+        SKL_TKN_U32_DIR_PIN_COUNT "96"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_7" {
+        SKL_TKN_U32_DIR_PIN_COUNT "112"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "3"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+}
+
+SectionData."codec1_out mo" {
+    tuples "codec1_out mo"
+}
+
+SectionWidget."codec1_out mo" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    subseq "10"
+    event_type "1"
+    event_flags "15"
+
+    mixer [
+        "media1_in mi Switch"
+    ]
+
+    data [
+        "codec1_out mo num_desc"
+        "codec1_out mo_size_desc"
+        "codec1_out mo"
+    ]
+}
+
+SectionVendorTuples."codec1_out cpr 3 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec1_out cpr 3 num_desc" {
+    tuples "codec1_out cpr 3 num_desc"
+}
+
+SectionVendorTuples."codec1_out cpr 3_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "440"
+    }
+}
+
+SectionData."codec1_out cpr 3_size_desc" {
+    tuples "codec1_out cpr 3_size_desc"
+}
+
+SectionVendorTuples."codec1_out cpr 3" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "2"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "4"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "3"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "3"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "1"
+        SKL_TKN_CFG_MOD_FMT_ID "1"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "1"
+        SKL_TKN_U32_PIN_INST_ID "1"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."codec1_out cpr 3" {
+    tuples "codec1_out cpr 3"
+}
+
+SectionWidget."codec1_out cpr 3" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    event_type "4"
+
+    data [
+        "codec1_out cpr 3 num_desc"
+        "codec1_out cpr 3_size_desc"
+        "codec1_out cpr 3"
+    ]
+}
+
+SectionWidget."codec1_out" {
+    index "0"
+    type "aif_out"
+    no_pm "true"
+}
+
+SectionVendorTuples."media2_in cpr 4 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media2_in cpr 4 num_desc" {
+    tuples "media2_in cpr 4 num_desc"
+}
+
+SectionVendorTuples."media2_in cpr 4_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "500"
+    }
+}
+
+SectionData."media2_in cpr 4_size_desc" {
+    tuples "media2_in cpr 4_size_desc"
+}
+
+SectionVendorTuples."media2_in cpr 4" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "1"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "4"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "4"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "1"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "2"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."media2_in cpr 4" {
+    tuples "media2_in cpr 4"
+}
+
+SectionWidget."media2_in cpr 4" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "media2_in cpr 4 num_desc"
+        "media2_in cpr 4_size_desc"
+        "media2_in cpr 4"
+    ]
+}
+
+SectionVendorTuples."media2_in mi num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media2_in mi num_desc" {
+    tuples "media2_in mi num_desc"
+}
+
+SectionVendorTuples."media2_in mi_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "416"
+    }
+}
+
+SectionData."media2_in mi_size_desc" {
+    tuples "media2_in mi_size_desc"
+}
+
+SectionVendorTuples."media2_in mi" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "2"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "4"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "1"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "4"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."media2_in mi" {
+    tuples "media2_in mi"
+}
+
+SectionWidget."media2_in mi" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "media2_in mi num_desc"
+        "media2_in mi_size_desc"
+        "media2_in mi"
+    ]
+}
+
+SectionVendorTuples."codec2_out mo num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec2_out mo num_desc" {
+    tuples "codec2_out mo num_desc"
+}
+
+SectionVendorTuples."codec2_out mo_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "536"
+    }
+}
+
+SectionData."codec2_out mo_size_desc" {
+    tuples "codec2_out mo_size_desc"
+}
+
+SectionVendorTuples."codec2_out mo" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "2"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "5"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_4" {
+        SKL_TKN_U32_DIR_PIN_COUNT "64"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_5" {
+        SKL_TKN_U32_DIR_PIN_COUNT "80"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_6" {
+        SKL_TKN_U32_DIR_PIN_COUNT "96"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_7" {
+        SKL_TKN_U32_DIR_PIN_COUNT "112"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "5"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+}
+
+SectionData."codec2_out mo" {
+    tuples "codec2_out mo"
+}
+
+SectionWidget."codec2_out mo" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    subseq "10"
+    event_type "1"
+    event_flags "15"
+
+    mixer [
+        "media2_in mi Switch"
+    ]
+
+    data [
+        "codec2_out mo num_desc"
+        "codec2_out mo_size_desc"
+        "codec2_out mo"
+    ]
+}
+
+SectionVendorTuples."codec2_out cpr 5 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec2_out cpr 5 num_desc" {
+    tuples "codec2_out cpr 5 num_desc"
+}
+
+SectionVendorTuples."codec2_out cpr 5_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "440"
+    }
+}
+
+SectionData."codec2_out cpr 5_size_desc" {
+    tuples "codec2_out cpr 5_size_desc"
+}
+
+SectionVendorTuples."codec2_out cpr 5" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "2"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "4"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "5"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "5"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "1"
+        SKL_TKN_CFG_MOD_FMT_ID "1"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "1"
+        SKL_TKN_U32_PIN_INST_ID "2"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."codec2_out cpr 5" {
+    tuples "codec2_out cpr 5"
+}
+
+SectionWidget."codec2_out cpr 5" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    event_type "4"
+
+    data [
+        "codec2_out cpr 5 num_desc"
+        "codec2_out cpr 5_size_desc"
+        "codec2_out cpr 5"
+    ]
+}
+
+SectionWidget."codec2_out" {
+    index "0"
+    type "aif_out"
+    no_pm "true"
+}
+
+SectionVendorTuples."codec0_in cpr 6 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec0_in cpr 6 num_desc" {
+    tuples "codec0_in cpr 6 num_desc"
+}
+
+SectionVendorTuples."codec0_in cpr 6_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "500"
+    }
+}
+
+SectionData."codec0_in cpr 6_size_desc" {
+    tuples "codec0_in cpr 6_size_desc"
+}
+
+SectionVendorTuples."codec0_in cpr 6" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "2"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "4"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "6"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "6"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "9"
+        SKL_TKN_CFG_MOD_FMT_ID "9"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "3"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."codec0_in cpr 6" {
+    tuples "codec0_in cpr 6"
+}
+
+SectionWidget."codec0_in cpr 6" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "codec0_in cpr 6 num_desc"
+        "codec0_in cpr 6_size_desc"
+        "codec0_in cpr 6"
+    ]
+}
+
+SectionVendorTuples."codec0_in mi num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec0_in mi num_desc" {
+    tuples "codec0_in mi num_desc"
+}
+
+SectionVendorTuples."codec0_in mi_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "416"
+    }
+}
+
+SectionData."codec0_in mi_size_desc" {
+    tuples "codec0_in mi_size_desc"
+}
+
+SectionVendorTuples."codec0_in mi" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "3"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "6"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "6"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."codec0_in mi" {
+    tuples "codec0_in mi"
+}
+
+SectionWidget."codec0_in mi" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "codec0_in mi num_desc"
+        "codec0_in mi_size_desc"
+        "codec0_in mi"
+    ]
+}
+
+SectionWidget."codec0_in" {
+    index "0"
+    type "aif_in"
+    no_pm "true"
+}
+
+SectionVendorTuples."media0_out mo num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media0_out mo num_desc" {
+    tuples "media0_out mo num_desc"
+}
+
+SectionVendorTuples."media0_out mo_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "536"
+    }
+}
+
+SectionData."media0_out mo_size_desc" {
+    tuples "media0_out mo_size_desc"
+}
+
+SectionVendorTuples."media0_out mo" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "3"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "7"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_4" {
+        SKL_TKN_U32_DIR_PIN_COUNT "64"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_5" {
+        SKL_TKN_U32_DIR_PIN_COUNT "80"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_6" {
+        SKL_TKN_U32_DIR_PIN_COUNT "96"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_7" {
+        SKL_TKN_U32_DIR_PIN_COUNT "112"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "7"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+}
+
+SectionData."media0_out mo" {
+    tuples "media0_out mo"
+}
+
+SectionWidget."media0_out mo" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    subseq "10"
+    event_type "1"
+    event_flags "15"
+
+    mixer [
+        "codec0_in mi Switch"
+    ]
+
+    data [
+        "media0_out mo num_desc"
+        "media0_out mo_size_desc"
+        "media0_out mo"
+    ]
+}
+
+SectionVendorTuples."media0_out cpr 7 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media0_out cpr 7 num_desc" {
+    tuples "media0_out cpr 7 num_desc"
+}
+
+SectionVendorTuples."media0_out cpr 7_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "440"
+    }
+}
+
+SectionData."media0_out cpr 7_size_desc" {
+    tuples "media0_out cpr 7_size_desc"
+}
+
+SectionVendorTuples."media0_out cpr 7" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "7"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "7"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "8"
+        SKL_TKN_CFG_MOD_FMT_ID "8"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "1"
+        SKL_TKN_U32_PIN_INST_ID "3"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."media0_out cpr 7" {
+    tuples "media0_out cpr 7"
+}
+
+SectionWidget."media0_out cpr 7" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    event_type "4"
+
+    data [
+        "media0_out cpr 7 num_desc"
+        "media0_out cpr 7_size_desc"
+        "media0_out cpr 7"
+    ]
+}
+
+SectionVendorTuples."codec1_in cpr 8 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec1_in cpr 8 num_desc" {
+    tuples "codec1_in cpr 8 num_desc"
+}
+
+SectionVendorTuples."codec1_in cpr 8_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "500"
+    }
+}
+
+SectionData."codec1_in cpr 8_size_desc" {
+    tuples "codec1_in cpr 8_size_desc"
+}
+
+SectionVendorTuples."codec1_in cpr 8" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "2"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "4"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "8"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "8"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "24"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "2"
+        SKL_TKN_CFG_MOD_FMT_ID "2"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "4"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."codec1_in cpr 8" {
+    tuples "codec1_in cpr 8"
+}
+
+SectionWidget."codec1_in cpr 8" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "codec1_in cpr 8 num_desc"
+        "codec1_in cpr 8_size_desc"
+        "codec1_in cpr 8"
+    ]
+}
+
+SectionVendorTuples."codec1_in mi num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec1_in mi num_desc" {
+    tuples "codec1_in mi num_desc"
+}
+
+SectionVendorTuples."codec1_in mi_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "416"
+    }
+}
+
+SectionData."codec1_in mi_size_desc" {
+    tuples "codec1_in mi_size_desc"
+}
+
+SectionVendorTuples."codec1_in mi" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "4"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "8"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "24"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "8"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."codec1_in mi" {
+    tuples "codec1_in mi"
+}
+
+SectionWidget."codec1_in mi" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "codec1_in mi num_desc"
+        "codec1_in mi_size_desc"
+        "codec1_in mi"
+    ]
+}
+
+SectionWidget."codec1_in" {
+    index "0"
+    type "aif_in"
+    no_pm "true"
+}
+
+SectionVendorTuples."media1_out mo num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media1_out mo num_desc" {
+    tuples "media1_out mo num_desc"
+}
+
+SectionVendorTuples."media1_out mo_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "536"
+    }
+}
+
+SectionData."media1_out mo_size_desc" {
+    tuples "media1_out mo_size_desc"
+}
+
+SectionVendorTuples."media1_out mo" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "4"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "9"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "24"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_4" {
+        SKL_TKN_U32_DIR_PIN_COUNT "64"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_5" {
+        SKL_TKN_U32_DIR_PIN_COUNT "80"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_6" {
+        SKL_TKN_U32_DIR_PIN_COUNT "96"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_7" {
+        SKL_TKN_U32_DIR_PIN_COUNT "112"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "9"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+}
+
+SectionData."media1_out mo" {
+    tuples "media1_out mo"
+}
+
+SectionWidget."media1_out mo" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    subseq "10"
+    event_type "1"
+    event_flags "15"
+
+    mixer [
+        "codec1_in mi Switch"
+    ]
+
+    data [
+        "media1_out mo num_desc"
+        "media1_out mo_size_desc"
+        "media1_out mo"
+    ]
+}
+
+SectionVendorTuples."media1_out cpr 9 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media1_out cpr 9 num_desc" {
+    tuples "media1_out cpr 9 num_desc"
+}
+
+SectionVendorTuples."media1_out cpr 9_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "440"
+    }
+}
+
+SectionData."media1_out cpr 9_size_desc" {
+    tuples "media1_out cpr 9_size_desc"
+}
+
+SectionVendorTuples."media1_out cpr 9" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "9"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "9"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "24"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "3"
+        SKL_TKN_CFG_MOD_FMT_ID "3"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "1"
+        SKL_TKN_U32_PIN_INST_ID "4"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."media1_out cpr 9" {
+    tuples "media1_out cpr 9"
+}
+
+SectionWidget."media1_out cpr 9" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    event_type "4"
+
+    data [
+        "media1_out cpr 9 num_desc"
+        "media1_out cpr 9_size_desc"
+        "media1_out cpr 9"
+    ]
+}
+
+SectionVendorTuples."codec2_in cpr 10 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec2_in cpr 10 num_desc" {
+    tuples "codec2_in cpr 10 num_desc"
+}
+
+SectionVendorTuples."codec2_in cpr 10_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "500"
+    }
+}
+
+SectionData."codec2_in cpr 10_size_desc" {
+    tuples "codec2_in cpr 10_size_desc"
+}
+
+SectionVendorTuples."codec2_in cpr 10" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "2"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "4"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "10"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "10"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "24"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "2"
+        SKL_TKN_CFG_MOD_FMT_ID "2"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "5"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."codec2_in cpr 10" {
+    tuples "codec2_in cpr 10"
+}
+
+SectionWidget."codec2_in cpr 10" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "codec2_in cpr 10 num_desc"
+        "codec2_in cpr 10_size_desc"
+        "codec2_in cpr 10"
+    ]
+}
+
+SectionVendorTuples."codec2_in mi num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."codec2_in mi num_desc" {
+    tuples "codec2_in mi num_desc"
+}
+
+SectionVendorTuples."codec2_in mi_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "416"
+    }
+}
+
+SectionData."codec2_in mi_size_desc" {
+    tuples "codec2_in mi_size_desc"
+}
+
+SectionVendorTuples."codec2_in mi" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "5"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "10"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "24"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "10"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."codec2_in mi" {
+    tuples "codec2_in mi"
+}
+
+SectionWidget."codec2_in mi" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "codec2_in mi num_desc"
+        "codec2_in mi_size_desc"
+        "codec2_in mi"
+    ]
+}
+
+SectionWidget."codec2_in" {
+    index "0"
+    type "aif_in"
+    no_pm "true"
+}
+
+SectionVendorTuples."media2_out mo num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media2_out mo num_desc" {
+    tuples "media2_out mo num_desc"
+}
+
+SectionVendorTuples."media2_out mo_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "536"
+    }
+}
+
+SectionData."media2_out mo_size_desc" {
+    tuples "media2_out mo_size_desc"
+}
+
+SectionVendorTuples."media2_out mo" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "5"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "11"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "24"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_4" {
+        SKL_TKN_U32_DIR_PIN_COUNT "64"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_5" {
+        SKL_TKN_U32_DIR_PIN_COUNT "80"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_6" {
+        SKL_TKN_U32_DIR_PIN_COUNT "96"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_7" {
+        SKL_TKN_U32_DIR_PIN_COUNT "112"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "11"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+}
+
+SectionData."media2_out mo" {
+    tuples "media2_out mo"
+}
+
+SectionWidget."media2_out mo" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    subseq "10"
+    event_type "1"
+    event_flags "15"
+
+    mixer [
+        "codec2_in mi Switch"
+    ]
+
+    data [
+        "media2_out mo num_desc"
+        "media2_out mo_size_desc"
+        "media2_out mo"
+    ]
+}
+
+SectionVendorTuples."media2_out cpr 11 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."media2_out cpr 11 num_desc" {
+    tuples "media2_out cpr 11 num_desc"
+}
+
+SectionVendorTuples."media2_out cpr 11_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "440"
+    }
+}
+
+SectionData."media2_out cpr 11_size_desc" {
+    tuples "media2_out cpr 11_size_desc"
+}
+
+SectionVendorTuples."media2_out cpr 11" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "11"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "11"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "1"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "1"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "32"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "24"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "3"
+        SKL_TKN_CFG_MOD_FMT_ID "3"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "1"
+        SKL_TKN_U32_PIN_INST_ID "5"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."media2_out cpr 11" {
+    tuples "media2_out cpr 11"
+}
+
+SectionWidget."media2_out cpr 11" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    event_type "4"
+
+    data [
+        "media2_out cpr 11 num_desc"
+        "media2_out cpr 11_size_desc"
+        "media2_out cpr 11"
+    ]
+}
+
+SectionVendorTuples."hdmi1_out cpr 12 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."hdmi1_out cpr 12 num_desc" {
+    tuples "hdmi1_out cpr 12 num_desc"
+}
+
+SectionVendorTuples."hdmi1_out cpr 12_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "788"
+    }
+}
+
+SectionData."hdmi1_out cpr 12_size_desc" {
+    tuples "hdmi1_out cpr 12_size_desc"
+}
+
+SectionVendorTuples."hdmi1_out cpr 12" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "1"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "12"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "12"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "4"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "4"
+        SKL_TKN_CFG_MOD_FMT_ID "4"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "5"
+        SKL_TKN_CFG_MOD_FMT_ID "5"
+    }
+
+    tuples."word._pipe_2" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "2"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_2" {
+        SKL_TKN_CFG_MOD_RES_ID "6"
+        SKL_TKN_CFG_MOD_FMT_ID "6"
+    }
+
+    tuples."word._pipe_3" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "3"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_3" {
+        SKL_TKN_CFG_MOD_RES_ID "7"
+        SKL_TKN_CFG_MOD_FMT_ID "7"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "13"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."hdmi1_out cpr 12" {
+    tuples "hdmi1_out cpr 12"
+}
+
+SectionWidget."hdmi1_out cpr 12" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "hdmi1_out cpr 12 num_desc"
+        "hdmi1_out cpr 12_size_desc"
+        "hdmi1_out cpr 12"
+    ]
+}
+
+SectionVendorTuples."hdmi1_out cpr 13 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."hdmi1_out cpr 13 num_desc" {
+    tuples "hdmi1_out cpr 13 num_desc"
+}
+
+SectionVendorTuples."hdmi1_out cpr 13_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "728"
+    }
+}
+
+SectionData."hdmi1_out cpr 13_size_desc" {
+    tuples "hdmi1_out cpr 13_size_desc"
+}
+
+SectionVendorTuples."hdmi1_out cpr 13" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "1"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "4"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "13"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "12"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "4"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "4"
+        SKL_TKN_CFG_MOD_FMT_ID "4"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "5"
+        SKL_TKN_CFG_MOD_FMT_ID "5"
+    }
+
+    tuples."word._pipe_2" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "2"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_2" {
+        SKL_TKN_CFG_MOD_RES_ID "6"
+        SKL_TKN_CFG_MOD_FMT_ID "6"
+    }
+
+    tuples."word._pipe_3" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "3"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_3" {
+        SKL_TKN_CFG_MOD_RES_ID "7"
+        SKL_TKN_CFG_MOD_FMT_ID "7"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "12"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."hdmi1_out cpr 13" {
+    tuples "hdmi1_out cpr 13"
+}
+
+SectionWidget."hdmi1_out cpr 13" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "hdmi1_out cpr 13 num_desc"
+        "hdmi1_out cpr 13_size_desc"
+        "hdmi1_out cpr 13"
+    ]
+}
+
+SectionControlEnum."hdmi1_out pcm cfg" {
+    texts "enum_hdmi1_out pcm cfg"
+    index "0"
+
+    ops."ctl" {
+        get "259"
+        put "259"
+        info "4"
+    }
+
+    access [
+        "read"
+        "write"
+        "read_write"
+    ]
+    data "hdmi1_out pcm cfg"
+}
+
+SectionText."enum_hdmi1_out pcm cfg" {
+
+    values [
+        "IN:f48000-c2-b16 OUT:f48000-c2-b16"
+        "IN:f48000-c4-b16 OUT:f48000-c4-b16"
+        "IN:f48000-c6-b16 OUT:f48000-c6-b16"
+        "IN:f48000-c8-b16 OUT:f48000-c8-b16"
+    ]
+}
+
+SectionData."hdmi1_out pcm cfg" {
+    bytes "0x0C, 0x00, 0x00, 0x00"
+}
+
+SectionWidget."iDisp1_out" {
+    index "0"
+    type "aif_out"
+    no_pm "true"
+}
+
+SectionVendorTuples."hdmi2_out cpr 14 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."hdmi2_out cpr 14 num_desc" {
+    tuples "hdmi2_out cpr 14 num_desc"
+}
+
+SectionVendorTuples."hdmi2_out cpr 14_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "788"
+    }
+}
+
+SectionData."hdmi2_out cpr 14_size_desc" {
+    tuples "hdmi2_out cpr 14_size_desc"
+}
+
+SectionVendorTuples."hdmi2_out cpr 14" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "1"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "14"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "13"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "4"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "4"
+        SKL_TKN_CFG_MOD_FMT_ID "4"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "5"
+        SKL_TKN_CFG_MOD_FMT_ID "5"
+    }
+
+    tuples."word._pipe_2" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "2"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_2" {
+        SKL_TKN_CFG_MOD_RES_ID "6"
+        SKL_TKN_CFG_MOD_FMT_ID "6"
+    }
+
+    tuples."word._pipe_3" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "3"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_3" {
+        SKL_TKN_CFG_MOD_RES_ID "7"
+        SKL_TKN_CFG_MOD_FMT_ID "7"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "15"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."hdmi2_out cpr 14" {
+    tuples "hdmi2_out cpr 14"
+}
+
+SectionWidget."hdmi2_out cpr 14" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "hdmi2_out cpr 14 num_desc"
+        "hdmi2_out cpr 14_size_desc"
+        "hdmi2_out cpr 14"
+    ]
+}
+
+SectionVendorTuples."hdmi2_out cpr 15 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."hdmi2_out cpr 15 num_desc" {
+    tuples "hdmi2_out cpr 15 num_desc"
+}
+
+SectionVendorTuples."hdmi2_out cpr 15_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "728"
+    }
+}
+
+SectionData."hdmi2_out cpr 15_size_desc" {
+    tuples "hdmi2_out cpr 15_size_desc"
+}
+
+SectionVendorTuples."hdmi2_out cpr 15" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "1"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "4"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "15"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "13"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "4"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "4"
+        SKL_TKN_CFG_MOD_FMT_ID "4"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "5"
+        SKL_TKN_CFG_MOD_FMT_ID "5"
+    }
+
+    tuples."word._pipe_2" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "2"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_2" {
+        SKL_TKN_CFG_MOD_RES_ID "6"
+        SKL_TKN_CFG_MOD_FMT_ID "6"
+    }
+
+    tuples."word._pipe_3" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "3"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_3" {
+        SKL_TKN_CFG_MOD_RES_ID "7"
+        SKL_TKN_CFG_MOD_FMT_ID "7"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "14"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."hdmi2_out cpr 15" {
+    tuples "hdmi2_out cpr 15"
+}
+
+SectionWidget."hdmi2_out cpr 15" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "hdmi2_out cpr 15 num_desc"
+        "hdmi2_out cpr 15_size_desc"
+        "hdmi2_out cpr 15"
+    ]
+}
+
+SectionControlEnum."hdmi2_out pcm cfg" {
+    texts "enum_hdmi2_out pcm cfg"
+    index "0"
+
+    ops."ctl" {
+        get "259"
+        put "259"
+        info "4"
+    }
+
+    access [
+        "read"
+        "write"
+        "read_write"
+    ]
+    data "hdmi2_out pcm cfg"
+}
+
+SectionText."enum_hdmi2_out pcm cfg" {
+
+    values [
+        "IN:f48000-c2-b16 OUT:f48000-c2-b16"
+        "IN:f48000-c4-b16 OUT:f48000-c4-b16"
+        "IN:f48000-c6-b16 OUT:f48000-c6-b16"
+        "IN:f48000-c8-b16 OUT:f48000-c8-b16"
+    ]
+}
+
+SectionData."hdmi2_out pcm cfg" {
+    bytes "0x0D, 0x00, 0x00, 0x00"
+}
+
+SectionWidget."iDisp2_out" {
+    index "0"
+    type "aif_out"
+    no_pm "true"
+}
+
+SectionVendorTuples."hdmi3_out cpr 16 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."hdmi3_out cpr 16 num_desc" {
+    tuples "hdmi3_out cpr 16 num_desc"
+}
+
+SectionVendorTuples."hdmi3_out cpr 16_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "788"
+    }
+}
+
+SectionData."hdmi3_out cpr 16_size_desc" {
+    tuples "hdmi3_out cpr 16_size_desc"
+}
+
+SectionVendorTuples."hdmi3_out cpr 16" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "1"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "16"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "14"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "4"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "4"
+        SKL_TKN_CFG_MOD_FMT_ID "4"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "5"
+        SKL_TKN_CFG_MOD_FMT_ID "5"
+    }
+
+    tuples."word._pipe_2" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "2"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_2" {
+        SKL_TKN_CFG_MOD_RES_ID "6"
+        SKL_TKN_CFG_MOD_FMT_ID "6"
+    }
+
+    tuples."word._pipe_3" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "3"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_3" {
+        SKL_TKN_CFG_MOD_RES_ID "7"
+        SKL_TKN_CFG_MOD_FMT_ID "7"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "17"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."hdmi3_out cpr 16" {
+    tuples "hdmi3_out cpr 16"
+}
+
+SectionWidget."hdmi3_out cpr 16" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "hdmi3_out cpr 16 num_desc"
+        "hdmi3_out cpr 16_size_desc"
+        "hdmi3_out cpr 16"
+    ]
+}
+
+SectionVendorTuples."hdmi3_out cpr 17 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."hdmi3_out cpr 17 num_desc" {
+    tuples "hdmi3_out cpr 17 num_desc"
+}
+
+SectionVendorTuples."hdmi3_out cpr 17_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "728"
+    }
+}
+
+SectionData."hdmi3_out cpr 17_size_desc" {
+    tuples "hdmi3_out cpr 17_size_desc"
+}
+
+SectionVendorTuples."hdmi3_out cpr 17" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "1"
+        SKL_TKN_U8_HW_CONN_TYPE "1"
+        SKL_TKN_U8_DEV_TYPE "4"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "17"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "14"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "0"
+        SKL_TKN_U32_NUM_CONFIGS "4"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "4"
+        SKL_TKN_CFG_MOD_FMT_ID "4"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "5"
+        SKL_TKN_CFG_MOD_FMT_ID "5"
+    }
+
+    tuples."word._pipe_2" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "2"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_2" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "6"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_2" {
+        SKL_TKN_CFG_MOD_RES_ID "6"
+        SKL_TKN_CFG_MOD_FMT_ID "6"
+    }
+
+    tuples."word._pipe_3" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "3"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_3" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "8"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_3" {
+        SKL_TKN_CFG_MOD_RES_ID "7"
+        SKL_TKN_CFG_MOD_FMT_ID "7"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "16"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."hdmi3_out cpr 17" {
+    tuples "hdmi3_out cpr 17"
+}
+
+SectionWidget."hdmi3_out cpr 17" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "hdmi3_out cpr 17 num_desc"
+        "hdmi3_out cpr 17_size_desc"
+        "hdmi3_out cpr 17"
+    ]
+}
+
+SectionControlEnum."hdmi3_out pcm cfg" {
+    texts "enum_hdmi3_out pcm cfg"
+    index "0"
+
+    ops."ctl" {
+        get "259"
+        put "259"
+        info "4"
+    }
+
+    access [
+        "read"
+        "write"
+        "read_write"
+    ]
+    data "hdmi3_out pcm cfg"
+}
+
+SectionText."enum_hdmi3_out pcm cfg" {
+
+    values [
+        "IN:f48000-c2-b16 OUT:f48000-c2-b16"
+        "IN:f48000-c4-b16 OUT:f48000-c4-b16"
+        "IN:f48000-c6-b16 OUT:f48000-c6-b16"
+        "IN:f48000-c8-b16 OUT:f48000-c8-b16"
+    ]
+}
+
+SectionData."hdmi3_out pcm cfg" {
+    bytes "0x0E, 0x00, 0x00, 0x00"
+}
+
+SectionWidget."iDisp3_out" {
+    index "0"
+    type "aif_out"
+    no_pm "true"
+}
+
+SectionVendorTuples."mch_cap_in cpr 18 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."mch_cap_in cpr 18 num_desc" {
+    tuples "mch_cap_in cpr 18 num_desc"
+}
+
+SectionVendorTuples."mch_cap_in cpr 18_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "596"
+    }
+}
+
+SectionData."mch_cap_in cpr 18_size_desc" {
+    tuples "mch_cap_in cpr 18_size_desc"
+}
+
+SectionVendorTuples."mch_cap_in cpr 18" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "2"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "1"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "18"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "0"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "15"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "2"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "11"
+        SKL_TKN_CFG_MOD_FMT_ID "11"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "13"
+        SKL_TKN_CFG_MOD_FMT_ID "13"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "6"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_1" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_2" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."uuid.out_pin_3" {
+        SKL_TKN_UUID "0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0"
+    }
+}
+
+SectionData."mch_cap_in cpr 18" {
+    tuples "mch_cap_in cpr 18"
+}
+
+SectionWidget."mch_cap_in cpr 18" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    data [
+        "mch_cap_in cpr 18 num_desc"
+        "mch_cap_in cpr 18_size_desc"
+        "mch_cap_in cpr 18"
+    ]
+}
+
+SectionVendorTuples."mch_cap_in mi num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."mch_cap_in mi num_desc" {
+    tuples "mch_cap_in mi num_desc"
+}
+
+SectionVendorTuples."mch_cap_in mi_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "512"
+    }
+}
+
+SectionData."mch_cap_in mi_size_desc" {
+    tuples "mch_cap_in mi_size_desc"
+}
+
+SectionVendorTuples."mch_cap_in mi" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "178, 110, 101, 57, 113, 59, 73, 64, 141, 63, 249, 44, 213, 196, 60, 9"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "6"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "15"
+        SKL_TKN_U32_PIPE_CONN_TYPE "2"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "2"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "1"
+        SKL_TKN_CFG_MOD_FMT_ID "1"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "18"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."mch_cap_in mi" {
+    tuples "mch_cap_in mi"
+}
+
+SectionWidget."mch_cap_in mi" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "mch_cap_in mi num_desc"
+        "mch_cap_in mi_size_desc"
+        "mch_cap_in mi"
+    ]
+}
+
+SectionControlEnum."mch_cap_in pcm cfg" {
+    texts "enum_mch_cap_in pcm cfg"
+    index "0"
+
+    ops."ctl" {
+        get "260"
+        put "260"
+        info "4"
+    }
+
+    access [
+        "read"
+    ]
+    data "mch_cap_in pcm cfg"
+}
+
+SectionText."enum_mch_cap_in pcm cfg" {
+
+    values [
+        "IN:f48000-c2-b16 OUT:f48000-c2-b16"
+        "IN:f48000-c4-b16 OUT:f48000-c4-b16"
+    ]
+}
+
+SectionData."mch_cap_in pcm cfg" {
+    bytes "0x0F, 0x00, 0x00, 0x00"
+}
+
+SectionWidget."DMIC01 Rx" {
+    index "0"
+    type "aif_in"
+    no_pm "true"
+}
+
+SectionVendorTuples."mch_cap_out mo num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."mch_cap_out mo num_desc" {
+    tuples "mch_cap_out mo num_desc"
+}
+
+SectionVendorTuples."mch_cap_out mo_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "632"
+    }
+}
+
+SectionData."mch_cap_out mo_size_desc" {
+    tuples "mch_cap_out mo_size_desc"
+}
+
+SectionVendorTuples."mch_cap_out mo" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "1"
+        SKL_TKN_U8_DYN_OUT_PIN "0"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "0"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "6"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "6"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "16"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "2"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "0"
+        SKL_TKN_CFG_MOD_FMT_ID "0"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "1"
+        SKL_TKN_CFG_MOD_FMT_ID "1"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "32"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "48"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_4" {
+        SKL_TKN_U32_DIR_PIN_COUNT "64"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_5" {
+        SKL_TKN_U32_DIR_PIN_COUNT "80"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_6" {
+        SKL_TKN_U32_DIR_PIN_COUNT "96"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.in_pin_7" {
+        SKL_TKN_U32_DIR_PIN_COUNT "112"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "2"
+        SKL_TKN_U32_PIN_INST_ID "19"
+    }
+
+    tuples."uuid.out_pin_0" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+}
+
+SectionData."mch_cap_out mo" {
+    tuples "mch_cap_out mo"
+}
+
+SectionWidget."mch_cap_out mo" {
+    index "0"
+    type "mixer"
+    no_pm "true"
+    event_type "3"
+    event_flags "9"
+
+    mixer [
+        "mch_cap_in mi Switch"
+    ]
+
+    data [
+        "mch_cap_out mo num_desc"
+        "mch_cap_out mo_size_desc"
+        "mch_cap_out mo"
+    ]
+}
+
+SectionVendorTuples."mch_cap_out cpr 19 num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."mch_cap_out cpr 19 num_desc" {
+    tuples "mch_cap_out cpr 19 num_desc"
+}
+
+SectionVendorTuples."mch_cap_out cpr 19_size_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_block_type" {
+        SKL_TKN_U8_BLOCK_TYPE "0"
+    }
+
+    tuples."short.u16_size_desc" {
+        SKL_TKN_U16_BLOCK_SIZE "536"
+    }
+}
+
+SectionData."mch_cap_out cpr 19_size_desc" {
+    tuples "mch_cap_out cpr 19_size_desc"
+}
+
+SectionVendorTuples."mch_cap_out cpr 19" {
+    tokens "skl_tokens"
+
+    tuples."uuid" {
+        SKL_TKN_UUID "131, 12, 160, 155, 18, 202, 131, 74, 148, 60, 31, 162, 232, 47, 157, 218"
+    }
+
+    tuples."byte.u8_data" {
+        SKL_TKN_U8_IN_PIN_TYPE "0"
+        SKL_TKN_U8_OUT_PIN_TYPE "0"
+        SKL_TKN_U8_DYN_IN_PIN "0"
+        SKL_TKN_U8_DYN_OUT_PIN "1"
+        SKL_TKN_U8_TIME_SLOT "0"
+        SKL_TKN_U8_CORE_ID "0"
+        SKL_TKN_U8_MODULE_TYPE "1"
+        SKL_TKN_U8_CONN_TYPE "0"
+        SKL_TKN_U8_HW_CONN_TYPE "2"
+        SKL_TKN_U8_DEV_TYPE "5"
+    }
+
+    tuples."short.u16_data" {
+        SKL_TKN_U16_MOD_INST_ID "19"
+    }
+
+    tuples."word.u32_data" {
+        SKL_TKN_U32_VBUS_ID "4294967295"
+        SKL_TKN_U32_PARAMS_FIXUP "0"
+        SKL_TKN_U32_CONVERTER "0"
+        SKL_TKN_U32_PIPE_ID "16"
+        SKL_TKN_U32_PIPE_CONN_TYPE "1"
+        SKL_TKN_U32_PIPE_PRIORITY "0"
+        SKL_TKN_U32_PMODE "0"
+        SKL_TKN_U32_D0I3_CAPS "0"
+        SKL_TKN_U32_PROC_DOMAIN "0"
+        SKL_TKN_U32_PIPE_DIRECTION "1"
+        SKL_TKN_U32_NUM_CONFIGS "2"
+        SKL_TKN_U32_DMA_BUF_SIZE "2"
+    }
+
+    tuples."word._pipe_0" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "0"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_0" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "2"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_0" {
+        SKL_TKN_CFG_MOD_RES_ID "12"
+        SKL_TKN_CFG_MOD_FMT_ID "12"
+    }
+
+    tuples."word._pipe_1" {
+        SKL_TKN_U32_PIPE_CONFIG_ID "1"
+        SKL_TKN_U32_PATH_MEM_PGS "2"
+    }
+
+    tuples."word._pipe_u32_cfg_in_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "16"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_in_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."word._pipe_u32_cfg_out_fmt_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_CFG_FREQ "48000"
+    }
+
+    tuples."word._pipe_u8_cfg_out_fmt_1" {
+        SKL_TKN_U8_CFG_BPS "16"
+        SKL_TKN_U8_CFG_CHAN "4"
+    }
+
+    tuples."short.u16_pipe_mod_cfg_1" {
+        SKL_TKN_CFG_MOD_RES_ID "14"
+        SKL_TKN_CFG_MOD_FMT_ID "14"
+    }
+
+    tuples."word.in_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "0"
+        SKL_TKN_U32_PIN_MOD_ID "1"
+        SKL_TKN_U32_PIN_INST_ID "6"
+    }
+
+    tuples."uuid.in_pin_0" {
+        SKL_TKN_UUID "90, 80, 86, 60, 215, 36, 143, 65, 189, 220, 193, 245, 163, 172, 42, 224"
+    }
+
+    tuples."word.out_pin_0" {
+        SKL_TKN_U32_DIR_PIN_COUNT "1"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_1" {
+        SKL_TKN_U32_DIR_PIN_COUNT "17"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_2" {
+        SKL_TKN_U32_DIR_PIN_COUNT "33"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+
+    tuples."word.out_pin_3" {
+        SKL_TKN_U32_DIR_PIN_COUNT "49"
+        SKL_TKN_U32_PIN_MOD_ID "0"
+        SKL_TKN_U32_PIN_INST_ID "0"
+    }
+}
+
+SectionData."mch_cap_out cpr 19" {
+    tuples "mch_cap_out cpr 19"
+}
+
+SectionWidget."mch_cap_out cpr 19" {
+    index "0"
+    type "pga"
+    no_pm "true"
+    subseq "10"
+    event_type "4"
+    event_flags "9"
+
+    data [
+        "mch_cap_out cpr 19 num_desc"
+        "mch_cap_out cpr 19_size_desc"
+        "mch_cap_out cpr 19"
+    ]
+}
+
+SectionControlEnum."mch_cap_out pcm cfg" {
+    texts "enum_mch_cap_out pcm cfg"
+    index "0"
+
+    ops."ctl" {
+        get "260"
+        put "260"
+        info "4"
+    }
+
+    access [
+        "read"
+    ]
+    data "mch_cap_out pcm cfg"
+}
+
+SectionText."enum_mch_cap_out pcm cfg" {
+
+    values [
+        "IN:f48000-c2-b16 OUT:f48000-c2-b16"
+        "IN:f48000-c4-b16 OUT:f48000-c4-b16"
+    ]
+}
+
+SectionData."mch_cap_out pcm cfg" {
+    bytes "0x10, 0x00, 0x00, 0x00"
+}
+
+SectionControlMixer."media0_in mi Switch" {
+    max "1"
+    invert "false"
+    index "0"
+
+    channel."fl" {
+        reg "-1"
+        shift "0"
+    }
+
+    channel."fr" {
+        reg "-1"
+        shift "0"
+    }
+
+    ops."ctl" {
+        get "64"
+        put "64"
+        info "1"
+    }
+}
+
+SectionControlMixer."media1_in mi Switch" {
+    max "1"
+    invert "false"
+    index "0"
+
+    channel."fl" {
+        reg "-1"
+        shift "0"
+    }
+
+    channel."fr" {
+        reg "-1"
+        shift "0"
+    }
+
+    ops."ctl" {
+        get "64"
+        put "64"
+        info "1"
+    }
+}
+
+SectionControlMixer."media2_in mi Switch" {
+    max "1"
+    invert "false"
+    index "0"
+
+    channel."fl" {
+        reg "-1"
+        shift "0"
+    }
+
+    channel."fr" {
+        reg "-1"
+        shift "0"
+    }
+
+    ops."ctl" {
+        get "64"
+        put "64"
+        info "1"
+    }
+}
+
+SectionControlMixer."codec0_in mi Switch" {
+    max "1"
+    invert "false"
+    index "0"
+
+    channel."fl" {
+        reg "-1"
+        shift "0"
+    }
+
+    channel."fr" {
+        reg "-1"
+        shift "0"
+    }
+
+    ops."ctl" {
+        get "64"
+        put "64"
+        info "1"
+    }
+}
+
+SectionControlMixer."codec1_in mi Switch" {
+    max "1"
+    invert "false"
+    index "0"
+
+    channel."fl" {
+        reg "-1"
+        shift "0"
+    }
+
+    channel."fr" {
+        reg "-1"
+        shift "0"
+    }
+
+    ops."ctl" {
+        get "64"
+        put "64"
+        info "1"
+    }
+}
+
+SectionControlMixer."codec2_in mi Switch" {
+    max "1"
+    invert "false"
+    index "0"
+
+    channel."fl" {
+        reg "-1"
+        shift "0"
+    }
+
+    channel."fr" {
+        reg "-1"
+        shift "0"
+    }
+
+    ops."ctl" {
+        get "64"
+        put "64"
+        info "1"
+    }
+}
+
+SectionControlMixer."mch_cap_in mi Switch" {
+    max "1"
+    invert "false"
+    index "0"
+
+    channel."fl" {
+        reg "-1"
+        shift "0"
+    }
+
+    channel."fr" {
+        reg "-1"
+        shift "0"
+    }
+
+    ops."ctl" {
+        get "64"
+        put "64"
+        info "1"
+    }
+}
+
+SectionGraph."Pipeline 1 Graph" {
+    index "0"
+
+    lines [
+        "media0_in cpr 0, , hda-dsp-analog-playback"
+        "media0_in updwmix 0, , media0_in cpr 0"
+        "media0_in srcintc 0, , media0_in updwmix 0"
+        "media0_in mi, , media0_in srcintc 0"
+        "codec0_out cpr 1, , codec0_out mo"
+        "codec0_out, , codec0_out cpr 1"
+        "media1_in cpr 2, , hda-dsp-digital-playback"
+        "media1_in mi, , media1_in cpr 2"
+        "codec1_out cpr 3, , codec1_out mo"
+        "codec1_out, , codec1_out cpr 3"
+        "media2_in cpr 4, , hda-dsp-alt-analog-playback"
+        "media2_in mi, , media2_in cpr 4"
+        "codec2_out cpr 5, , codec2_out mo"
+        "codec2_out, , codec2_out cpr 5"
+        "codec0_in cpr 6, , codec0_in"
+        "codec0_in mi, , codec0_in cpr 6"
+        "media0_out cpr 7, , media0_out mo"
+        "hda-dsp-audio-analog-capture, , media0_out cpr 7"
+        "codec1_in cpr 8, , codec1_in"
+        "codec1_in mi, , codec1_in cpr 8"
+        "media1_out cpr 9, , media1_out mo"
+        "hda-dsp-audio-digital-capture, , media1_out cpr 9"
+        "codec2_in cpr 10, , codec2_in"
+        "codec2_in mi, , codec2_in cpr 10"
+        "media2_out cpr 11, , media2_out mo"
+        "hda-dsp-audio-alt-analog-capture, , media2_out cpr 11"
+        "hdmi1_out cpr 12, , HDMI1 Playback"
+        "hdmi1_out cpr 13, , hdmi1_out cpr 12"
+        "iDisp1_out, , hdmi1_out cpr 13"
+        "hdmi2_out cpr 14, , HDMI2 Playback"
+        "hdmi2_out cpr 15, , hdmi2_out cpr 14"
+        "iDisp2_out, , hdmi2_out cpr 15"
+        "hdmi3_out cpr 16, , HDMI3 Playback"
+        "hdmi3_out cpr 17, , hdmi3_out cpr 16"
+        "iDisp3_out, , hdmi3_out cpr 17"
+        "mch_cap_in cpr 18, , DMIC01 Rx"
+        "mch_cap_in mi, , mch_cap_in cpr 18"
+        "mch_cap_out cpr 19, , mch_cap_out mo"
+        "DMIC-Capture, , mch_cap_out cpr 19"
+        "codec0_out mo, media0_in mi Switch, media0_in mi"
+        "codec1_out mo, media1_in mi Switch, media1_in mi"
+        "codec2_out mo, media2_in mi Switch, media2_in mi"
+        "media0_out mo, codec0_in mi Switch, codec0_in mi"
+        "media1_out mo, codec1_in mi Switch, codec1_in mi"
+        "media2_out mo, codec2_in mi Switch, codec2_in mi"
+        "mch_cap_out mo, mch_cap_in mi Switch, mch_cap_in mi"
+    ]
+}
+
+SectionPCMCapabilities."hda-dsp-analog-playback" {
+    formats "S16_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "2"
+    sig_bits "16"
+}
+
+SectionPCMCapabilities."hda-dsp-audio-analog-capture" {
+    formats "S16_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "2"
+    sig_bits "16"
+}
+
+SectionPCM."Analog HDA DSP" {
+    index "0"
+    id "0"
+
+    dai."hda-dsp-analog-dai" {
+        id "0"
+    }
+
+    pcm."playback" {
+        capabilities "hda-dsp-analog-playback"
+    }
+
+    pcm."capture" {
+        capabilities "hda-dsp-audio-analog-capture"
+    }
+}
+
+SectionPCMCapabilities."hda-dsp-digital-playback" {
+    formats "S16_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "2"
+    sig_bits "16"
+}
+
+SectionPCMCapabilities."hda-dsp-audio-digital-capture" {
+    formats "S24_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "2"
+    sig_bits "24"
+}
+
+SectionPCM."Digital HDA DSP" {
+    index "0"
+    id "0"
+
+    dai."hda-dsp-digital-dai" {
+        id "1"
+    }
+
+    pcm."playback" {
+        capabilities "hda-dsp-digital-playback"
+    }
+
+    pcm."capture" {
+        capabilities "hda-dsp-audio-digital-capture"
+    }
+}
+
+SectionPCMCapabilities."hda-dsp-alt-analog-playback" {
+    formats "S16_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "2"
+    sig_bits "16"
+}
+
+SectionPCMCapabilities."hda-dsp-audio-alt-analog-capture" {
+    formats "S24_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "2"
+    sig_bits "24"
+}
+
+SectionPCM."Alt Analog HDA DSP" {
+    index "0"
+    id "0"
+
+    dai."hda-dsp-alt-analog-dai" {
+        id "2"
+    }
+
+    pcm."playback" {
+        capabilities "hda-dsp-alt-analog-playback"
+    }
+
+    pcm."capture" {
+        capabilities "hda-dsp-audio-alt-analog-capture"
+    }
+}
+
+SectionPCMCapabilities."HDMI1 Playback" {
+    formats "S16_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "8"
+    sig_bits "16"
+}
+
+SectionPCM."HDA DSP HDMI1" {
+    index "0"
+    id "255"
+
+    dai."hdmi1" {
+        id "3"
+    }
+
+    pcm."playback" {
+        capabilities "HDMI1 Playback"
+    }
+}
+
+SectionPCMCapabilities."HDMI2 Playback" {
+    formats "S16_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "8"
+    sig_bits "16"
+}
+
+SectionPCM."HDA DSP HDMI2" {
+    index "0"
+    id "255"
+
+    dai."hdmi2" {
+        id "4"
+    }
+
+    pcm."playback" {
+        capabilities "HDMI2 Playback"
+    }
+}
+
+SectionPCMCapabilities."HDMI3 Playback" {
+    formats "S16_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "8"
+    sig_bits "16"
+}
+
+SectionPCM."HDA DSP HDMI3" {
+    index "0"
+    id "255"
+
+    dai."hdmi3" {
+        id "5"
+    }
+
+    pcm."playback" {
+        capabilities "HDMI3 Playback"
+    }
+}
+
+SectionPCMCapabilities."DMIC-Capture" {
+    formats "S16_LE"
+    rates "48000"
+    channels_min "2"
+    channels_max "4"
+    sig_bits "16"
+}
+
+SectionPCM."DMIC1" {
+    index "0"
+    id "0"
+
+    dai."hda-dsp-dmic-dai" {
+        id "6"
+    }
+
+    pcm."capture" {
+        capabilities "DMIC-Capture"
+    }
+}
+
+SectionVendorTuples."manifest_data num_desc" {
+    tokens "skl_tokens"
+
+    tuples."byte.u8_num_blocks" {
+        SKL_TKN_U8_NUM_BLOCKS "1"
+    }
+}
+
+SectionData."manifest_data num_desc" {
+    tuples "manifest_data num_desc"
+}
+
+SectionManifest."manifest_data" {
+
+    data [
+        "manifest_data num_desc"
+        "mod_type_data_size_desc"
+        "mod_type_data"
+    ]
+}