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[92.233.226.227]) by smtp.gmail.com with ESMTPSA id d15sm4488923wrx.93.2020.12.04.08.42.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Dec 2020 08:42:31 -0800 (PST) From: Srinivas Kandagatla To: broonie@kernel.org Subject: [PATCH] ASoC: q6afe-clocks: Add missing parent clock rate Date: Fri, 4 Dec 2020 16:42:28 +0000 Message-Id: <20201204164228.1826-1-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Cc: lgirdwood@gmail.com, alsa-devel@alsa-project.org, Srinivas Kandagatla , linux-kernel@vger.kernel.org X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" setting clock rate on child clocks without a parent clock rate will result in zero clk rate for child. This also means that when audio is started dsp will attempt to access registers without enabling clock resulting in board boot up. Fix this by adding the missing parent clock rate. Fixes: 520a1c396d196 ("ASoC: q6afe-clocks: add q6afe clock controller") Signed-off-by: Srinivas Kandagatla --- sound/soc/qcom/qdsp6/q6afe-clocks.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/soc/qcom/qdsp6/q6afe-clocks.c b/sound/soc/qcom/qdsp6/q6afe-clocks.c index 87e4633afe2c..f0362f061652 100644 --- a/sound/soc/qcom/qdsp6/q6afe-clocks.c +++ b/sound/soc/qcom/qdsp6/q6afe-clocks.c @@ -16,6 +16,7 @@ .afe_clk_id = Q6AFE_##id, \ .name = #id, \ .attributes = LPASS_CLK_ATTRIBUTE_COUPLE_NO, \ + .rate = 19200000, \ .hw.init = &(struct clk_init_data) { \ .ops = &clk_q6afe_ops, \ .name = #id, \