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IronPort-SDR: b1QKTRCL3OutM/khAUSHwQaIZo1GLML5eG0GIeYcLd6sZjl5QEn4lmJem+pA6p0jehOadPGDZD kJo832DwQhMdCQKpFfF8SAnscOqbhjFNxIovjQlYKDXaiyycRCP+T6RtpjhAprVp/0w9GrQCqe JOqX5DcXNDDeHWBw7VQq3RPirpORyhT67Xf6hM/RxsGLbaikatudmZ/gLiT+MXKzed0iQZrMsQ 0OVoXF/CITxhBFcAA+PAq8jiEDWwvaFcMuNjqcG8Q841PCmo4J1X5TrEz3542EroMsv7qOoYUT VFo= X-IronPort-AV: E=Sophos;i="5.81,215,1610434800"; d="scan'208";a="111511668" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 01 Mar 2021 10:09:46 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Mon, 1 Mar 2021 10:09:41 -0700 Received: from rob-ult-m19940.amer.actel.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Mon, 1 Mar 2021 10:09:38 -0700 From: Codrin Ciubotariu To: , , , Subject: [PATCH v2 2/7] ASoC: mchp-i2s-mcc: Add compatible for SAMA7G5 Date: Mon, 1 Mar 2021 19:09:00 +0200 Message-ID: <20210301170905.835091-3-codrin.ciubotariu@microchip.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210301170905.835091-1-codrin.ciubotariu@microchip.com> References: <20210301170905.835091-1-codrin.ciubotariu@microchip.com> MIME-Version: 1.0 Cc: alexandre.belloni@bootlin.com, lgirdwood@gmail.com, nicolas.ferre@microchip.com, robh+dt@kernel.org, tiwai@suse.com, ludovic.desroches@microchip.com, broonie@kernel.org, Codrin Ciubotariu X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" Microchip's new SAMA7G5 includes an updated I2S-MCC compatible with the previous version found on SAM9X60. The new controller includes 8 (4 * 2) input and output data pins for up to 8 channels for I2S and Left-Justified formats. Signed-off-by: Codrin Ciubotariu --- Changes in v2: - none sound/soc/atmel/Kconfig | 3 +++ sound/soc/atmel/mchp-i2s-mcc.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/sound/soc/atmel/Kconfig b/sound/soc/atmel/Kconfig index 9fe9471f4514..ec04e3386bc0 100644 --- a/sound/soc/atmel/Kconfig +++ b/sound/soc/atmel/Kconfig @@ -127,10 +127,13 @@ config SND_MCHP_SOC_I2S_MCC Say Y or M if you want to add support for I2S Multi-Channel ASoC driver on the following Microchip platforms: - sam9x60 + - sama7g5 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and supports a Time Division Multiplexed (TDM) interface with external multi-channel audio codecs. + Starting with sama7g5, I2S and Left-Justified multi-channel is + supported by using multiple data pins, output and input, without TDM. config SND_MCHP_SOC_SPDIFTX tristate "Microchip ASoC driver for boards using S/PDIF TX" diff --git a/sound/soc/atmel/mchp-i2s-mcc.c b/sound/soc/atmel/mchp-i2s-mcc.c index 6d5ae18f8b38..0ee01383e307 100644 --- a/sound/soc/atmel/mchp-i2s-mcc.c +++ b/sound/soc/atmel/mchp-i2s-mcc.c @@ -873,6 +873,9 @@ static const struct of_device_id mchp_i2s_mcc_dt_ids[] = { { .compatible = "microchip,sam9x60-i2smcc", }, + { + .compatible = "microchip,sama7g5-i2smcc", + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mchp_i2s_mcc_dt_ids);