From patchwork Mon Oct 25 10:56:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: YC Hung X-Patchwork-Id: 12581449 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99E02C433F5 for ; Mon, 25 Oct 2021 10:58:29 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 25B5B6054F for ; Mon, 25 Oct 2021 10:58:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 25B5B6054F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 97C8416BF; Mon, 25 Oct 2021 12:57:37 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 97C8416BF DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1635159507; bh=WUhgkLeYJxCMgVKFV56J/TSCoTVrKnDBWgz8GQ7MB8Q=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=Y9hS5vPd0D+cyh6nRpCqtI+frYmdQjEb+ffTu6JVmYnjpVwzi1xnhjYONeWU8wiwn 3qt5jAf5XMKzrRp6ZhnvuzGAYHdH8jjEATe4UMekeorsJ7tmgs/74kGznTfRIyKWIY 5BwzOrhVILldyEk8n3wVmqQWQPBZgMBuMHbgj91E= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 8E639F804F1; Mon, 25 Oct 2021 12:57:14 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 05338F804E5; Mon, 25 Oct 2021 12:57:11 +0200 (CEST) Received: from mailgw02.mediatek.com (unknown [1.203.163.81]) by alsa1.perex.cz (Postfix) with ESMTP id B88AFF80153 for ; Mon, 25 Oct 2021 12:57:02 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz B88AFF80153 Authentication-Results: alsa1.perex.cz; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="lBwEAfxs" X-UUID: f91e7be25dcf4db2b20f8862623b47eb-20211025 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=WUhgkLeYJxCMgVKFV56J/TSCoTVrKnDBWgz8GQ7MB8Q=; b=lBwEAfxshRAZjsCELOZa/D/Uz8JbhGckQ4FasVTYsPeX9oHJEojz09fF7BMyLKPtt3ZaownqTcZpNjt7+6bvLumFLvNnAtrIDLoRQHw4JmDFv1jhSXWRho/6rFQiRY2seu4rKeIxR4POo+jHn9IORhKT3Y0zojWuicAxLOMaTjs=; X-UUID: f91e7be25dcf4db2b20f8862623b47eb-20211025 Received: from mtkmbs10n1.mediatek.inc [(172.27.5.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1409730941; Mon, 25 Oct 2021 18:56:49 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 25 Oct 2021 18:56:51 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 25 Oct 2021 18:56:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 25 Oct 2021 18:56:51 +0800 From: YC Hung To: , , , Subject: [PATCH v3 2/2] dt-bindings: dsp: mediatek: Add mt8195 DSP binding support Date: Mon, 25 Oct 2021 18:56:35 +0800 Message-ID: <20211025105635.30625-3-yc.hung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20211025105635.30625-1-yc.hung@mediatek.com> References: <20211025105635.30625-1-yc.hung@mediatek.com> MIME-Version: 1.0 X-MTK: N Cc: devicetree@vger.kernel.org, alsa-devel@alsa-project.org, allen-kh.cheng@mediatek.com, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, trevor.wu@mediatek.com, yc.hung@mediatek.com, daniel.baluta@nxp.com, linux-arm-kernel@lists.infradead.org, angelogioacchino.delregno@collabora.com X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" This describes the mt8195 DSP device tree node. Signed-off-by: YC Hung --- .../bindings/dsp/mtk,mt8195-dsp.yaml | 139 ++++++++++++++++++ 1 file changed, 139 insertions(+) create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml new file mode 100644 index 000000000000..f113f71ca094 --- /dev/null +++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml @@ -0,0 +1,139 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek mt8195 DSP core + +maintainers: + - YC Hung + +description: | + Some boards from mt8195 contain a DSP core used for + advanced pre- and post- audio processing. +properties: + compatible: + const: mediatek,mt8195-dsp + + reg: + maxItems: 2 + + reg-names: + maxItems: 2 + + interrupts: + maxItems: 1 + + interrupt-names: + maxItems: 1 + + clocks: + items: + - description: mux for audio dsp clock + - description: 26M clock + - description: mux for audio dsp local bus + - description: default audio dsp local bus clock source + - description: clock gate for audio dsp clock + - description: mux for audio dsp access external bus + + clock-names: + items: + - const: adsp_sel + - const: clk26m_ck + - const: audio_local_bus + - const: mainpll_d7_d2 + - const: scp_adsp_audiodsp + - const: audio_h + + power-domains: + maxItems: 1 + + mboxes: + maxItems: 2 + + mbox-names: + description: + Specifies the mailboxes used to communicate with audio DSP + items: + - const: mbox0 + - const: mbox1 + + memory-region: + description: + phandle to a node describing reserved memory (System RAM memory) + used by DSP (see bindings/reserved-memory/reserved-memory.txt) + maxItems: 2 + + sound: + description: + Sound subnode includes ASoC platform, DPTx codec node, and + HDMI codec node. + + type: object + + properties: + mediatek,platform: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of MT8195 ASoC platform. + + mediatek,dptx-codec: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of MT8195 Display Port Tx codec node. + + mediatek,hdmi-codec: + $ref: "/schemas/types.yaml#/definitions/phandle" + description: The phandle of MT8195 HDMI codec node. + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clock-names + - memory-region + - power-domains + - mbox-names + - mboxes + - sound + + +additionalProperties: false + +examples: + - | + #include + #include + adsp: adsp@10803000 { + compatible = "mediatek,mt8195-dsp"; + reg = <0x10803000 0x1000>, + <0x10840000 0x40000>; + reg-names = "cfg", "sram"; + interrupts = ; + interrupt-names = "wdt"; + clocks = <&topckgen 10>, //CLK_TOP_ADSP + <&clk26m>, + <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS + <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2 + <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP + <&topckgen 34>; //CLK_TOP_AUDIO_H + clock-names = "adsp_sel", + "clk26m_ck", + "audio_local_bus", + "mainpll_d7_d2", + "scp_adsp_audiodsp", + "audio_h"; + memory-region = <&adsp_dma_mem_reserved>, + <&adsp_mem_reserved>; + power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP + mbox-names = "mbox0", "mbox1"; + mboxes = <&adsp_mailbox 0>, <&adsp_mailbox 1>; + status = "disabled"; + sound { + mediatek,dptx-codec = <&dp_tx>; + mediatek,hdmi-codec = <&hdmi0>; + mediatek,platform = <&afe>; + }; + };