| Message ID | 20211122222203.4103644-5-arnd@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | dmaengine: kill off dma_slave_config->slave_id | expand |
On Mon, 22 Nov 2021 at 23:23, Arnd Bergmann <arnd@kernel.org> wrote: > > From: Arnd Bergmann <arnd@arndb.de> > > The field is not interpreted by the DMA engine driver, as all the data > is passed from devicetree instead. Remove the assignment so the field > can eventually be deleted. > > Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org> > Signed-off-by: Arnd Bergmann <arnd@arndb.de> I think I acked the previous version, but nevermind: Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Kind regards Uffe > --- > drivers/mmc/host/bcm2835.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c > index 8c2361e66277..463b707d9e99 100644 > --- a/drivers/mmc/host/bcm2835.c > +++ b/drivers/mmc/host/bcm2835.c > @@ -1293,14 +1293,12 @@ static int bcm2835_add_host(struct bcm2835_host *host) > > host->dma_cfg_tx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; > host->dma_cfg_tx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; > - host->dma_cfg_tx.slave_id = 13; /* DREQ channel */ > host->dma_cfg_tx.direction = DMA_MEM_TO_DEV; > host->dma_cfg_tx.src_addr = 0; > host->dma_cfg_tx.dst_addr = host->phys_addr + SDDATA; > > host->dma_cfg_rx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; > host->dma_cfg_rx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; > - host->dma_cfg_rx.slave_id = 13; /* DREQ channel */ > host->dma_cfg_rx.direction = DMA_DEV_TO_MEM; > host->dma_cfg_rx.src_addr = host->phys_addr + SDDATA; > host->dma_cfg_rx.dst_addr = 0; > -- > 2.29.2 >
diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c index 8c2361e66277..463b707d9e99 100644 --- a/drivers/mmc/host/bcm2835.c +++ b/drivers/mmc/host/bcm2835.c @@ -1293,14 +1293,12 @@ static int bcm2835_add_host(struct bcm2835_host *host) host->dma_cfg_tx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; host->dma_cfg_tx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; - host->dma_cfg_tx.slave_id = 13; /* DREQ channel */ host->dma_cfg_tx.direction = DMA_MEM_TO_DEV; host->dma_cfg_tx.src_addr = 0; host->dma_cfg_tx.dst_addr = host->phys_addr + SDDATA; host->dma_cfg_rx.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; host->dma_cfg_rx.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; - host->dma_cfg_rx.slave_id = 13; /* DREQ channel */ host->dma_cfg_rx.direction = DMA_DEV_TO_MEM; host->dma_cfg_rx.src_addr = host->phys_addr + SDDATA; host->dma_cfg_rx.dst_addr = 0;