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[7/7] ASoC: SOF: Intel: add comment on JasperLake support

Message ID 20211207193947.71080-8-pierre-louis.bossart@linux.intel.com (mailing list archive)
State Accepted
Commit 290a7c5509b6f14c28e959392f3cbc4d5b2c9318
Headers show
Series ASoC: Intel: SOF: clarifications on hardware support | expand

Commit Message

Pierre-Louis Bossart Dec. 7, 2021, 7:39 p.m. UTC 
Explain why JasperLake is exposed in cnl.c instead of icl.c
No functionality change.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
 sound/soc/sof/intel/cnl.c | 7 +++++++
 1 file changed, 7 insertions(+)
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Patch

diff --git a/sound/soc/sof/intel/cnl.c b/sound/soc/sof/intel/cnl.c
index 04daaa6100f1..3da158d08980 100644
--- a/sound/soc/sof/intel/cnl.c
+++ b/sound/soc/sof/intel/cnl.c
@@ -358,6 +358,13 @@  const struct sof_intel_dsp_desc cnl_chip_info = {
 };
 EXPORT_SYMBOL_NS(cnl_chip_info, SND_SOC_SOF_INTEL_HDA_COMMON);
 
+/*
+ * JasperLake is technically derived from IceLake, and should be in
+ * described in icl.c. However since JasperLake was designed with
+ * two cores, it cannot support the IceLake-specific power-up sequences
+ * which rely on core3. To simplify, JasperLake uses the CannonLake ops and
+ * is described in cnl.c
+ */
 const struct sof_intel_dsp_desc jsl_chip_info = {
 	/* Jasperlake */
 	.cores_num = 2,